mirror of https://github.com/openXC7/prjxray.git
12 lines
421 B
Markdown
12 lines
421 B
Markdown
# LiteX minitest
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This folder contains a minitest for a Linux capable LiteX SoC for Arty board.
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There are two variants: for Vivado only flow and for Yosys+Vivado flow. In order to run one of them enter the specific directory and run `make`.
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The SoC "gateware" files were generated using the command:
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```
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./arty.py --cpu-type vexriscv --cpu-variant linux --with-ethernet --no-compile-software --no-compile-gateware
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```
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