mirror of https://github.com/openXC7/prjxray.git
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com> |
||
|---|---|---|
| .. | ||
| src.vivado | ||
| src.yosys | ||
| .gitignore | ||
| README.md | ||
README.md
LiteX minitest
This folder contains a minitest for a Linux capable LiteX SoC for Arty board.
There are two variants: for Vivado only flow and for Yosys+Vivado flow. In order to run one of them enter the specific directory and run make.
The SoC "gateware" files were generated using the command:
./arty.py --cpu-type vexriscv --cpu-variant linux --with-ethernet --no-compile-software --no-compile-gateware