prjxray/minitests/roi_harness
Tim 'mithro' Ansell a8ff30b32f minitest/roi_harness: Strip trailing spaces
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
2019-03-26 18:29:07 -07:00
..
.gitignore roi_harness: basys3 small ROI. Simplified build dir 2018-10-01 15:53:12 -07:00
Makefile Fixup clean target. 2018-10-30 15:06:19 -07:00
README.md minitest/roi_harness: Strip trailing spaces 2019-03-26 18:29:07 -07:00
arty-common.sh minitests/roi_harness: Adding harness configs. 2019-03-26 18:29:02 -07:00
arty-pmod.sh minitests/roi_harness: Adding harness configs. 2019-03-26 18:29:02 -07:00
arty-swbut.sh minitests/roi_harness: Adding harness configs. 2019-03-26 18:29:02 -07:00
arty-uart.sh minitests/roi_harness: Adding harness configs. 2019-03-26 18:29:02 -07:00
basys3-common.sh minitests/roi_harness: Adding harness configs. 2019-03-26 18:29:02 -07:00
basys3-swbut.sh minitests/roi_harness: Adding harness configs. 2019-03-26 18:29:02 -07:00
create_design_json.py add bits outside ROI to required features 2019-03-21 16:43:59 +01:00
demo_sw_led.py roi_harness: add README info, chmod +x 2018-01-30 14:50:13 -08:00
demo_sw_led_fasm.py roi_harness: add README info, chmod +x 2018-01-30 14:50:13 -08:00
fasm2bit.sh Fix comments. 2018-10-22 11:20:03 -07:00
roi_base.v roi_harness: basys3 support, separate top.v into harness and ROI .v files 2018-01-18 18:05:36 -08:00
roi_demoscene.v bassy3 LED demos 2018-01-29 12:04:29 -08:00
roi_inv.v roi_harness: inverted LED/switch example 2018-01-18 19:12:38 -08:00
runme.sh Format harness JSON file. 2019-02-20 11:45:03 -08:00
runme.tcl minitest/roi_harness: Fixing comment indenting. 2019-03-26 18:29:07 -07:00
test_demo_sw_led.py roi_harness: add README info, chmod +x 2018-01-30 14:50:13 -08:00
top.v roi_harness: remove top.v test 2018-01-19 14:09:24 -08:00
zybo-common.sh minitests/roi_harness: Adding harness configs. 2019-03-26 18:29:02 -07:00
zybo-swbut.sh minitests/roi_harness: Adding harness configs. 2019-03-26 18:29:02 -07:00

README.md

ROI_HARNESS Minitest

Purpose

Creates an ROI with clk, inputs, and outputs to use as a partial reconfiguration test harness

Basic idea:

  • LOC LUTs in the ROI to terminate input and output routing
  • Let Vivado LOC the rest of the logic
  • Manually route signals in and out of the ROI enough to avoid routing loops into the ROI
  • Let Vivado finish the rest of the routes

There is no logic outside of the ROI in order to keep IOB to ROI delays short Its expected the end user will rip out everything inside the ROI

To target Arty A7 you should source the artix DB environment script then source arty.sh

To build the baseline harness:

./runme.sh

To build a sample Vivado design using the harness:

XRAY_ROIV=roi_inv.v XRAY_FIXED_XDC=out_xc7a35tcpg236-1_BASYS3-SWBUT_roi_basev/fixed_noclk.xdc ./runme.sh

Note: this was intended for verification only and not as an end user flow (they should use SymbiFlow)

To use the harness for the basys3 demo, do something like:

python3 demo_sw_led.py out_xc7a35tcpg236-1_BASYS3-SWBUT_roi_basev 3 2

This example connects switch 3 to LED 2

Result