mirror of https://github.com/openXC7/prjxray.git
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com> Signed-off-by: Tim 'mithro' Ansell <tansell@google.com> |
||
|---|---|---|
| .. | ||
| Makefile | ||
| README.md | ||
| par.tcl | ||
| srl32_init.v | ||
| srl32_x1.v | ||
| srl32_x1_and_lut6_x3.v | ||
| srl32_x2.v | ||
| srl32_x2_and_lut6_x2.v | ||
| srl32_x2_chain.v | ||
| srl32_x3.v | ||
| srl32_x3_and_lut6_x1.v | ||
| srl32_x3_chain.v | ||
| srl32_x4.v | ||
| srl32_x4_chain.v | ||
| syn.tcl | ||
README.md
Minitests for SRLs
This is a minitest for various SRL configurations.
Uses Yosys to generate EDIF which is then P&R'd by Vivado. The makefile also invokes bit2fasm and segprint