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fuzzers: 038-cfg: Add always on bit for Zynq
Signed-off-by: Tomasz Michalak <[email protected]>
This commit is contained in:
@@ -5,6 +5,11 @@ database: build/segbits_cfg.rdb
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${XRAY_DBFIXUP} --db-root build --zero-db bits.dbf \
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--seg-fn-in build/segbits_cfg.rdb \
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--seg-fn-out build/segbits_cfg.db
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# Some of the bits in Zynq seem to be always set
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# see https://github.com/SymbiFlow/prjxray/issues/746
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ifeq (${XRAY_DATABASE}, zynq7)
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python3 add_constant_bits.py build/segbits_cfg.db
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endif
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build/segbits_cfg.rdb: $(SPECIMENS_OK)
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@@ -0,0 +1,11 @@
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import sys
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constant_bits = {
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"CFG_CENTER_MID.ALWAYS_ON_PROP1": "26_2206",
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"CFG_CENTER_MID.ALWAYS_ON_PROP2": "26_2207",
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"CFG_CENTER_MID.ALWAYS_ON_PROP3": "27_2205"
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}
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with open(sys.argv[1], "a") as f:
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for bit_name, bit_value in constant_bits.items():
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f.write(bit_name + " " + bit_value + "\n")
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