Alexey Starikovskiy 0fc8ba10a8 Add WCH CH347T(mode #3) JTAG cable ... Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>		2023-07-26 08:17:57 +02:00
..
compatibility	doc/cable: move to yml	2022-02-20 15:47:35 +01:00
guide	DATA_DIR override with environment variable (#333)	2023-04-17 20:55:10 +02:00
vendors	efinix: support using JTAG interfaces	2023-06-01 11:05:26 +10:00
FPGAs.yml	Add Support for Xilinx Artix-7 a25t (xc7a25t)	2023-04-07 17:33:16 +12:00
Makefile	doc: add Sphinx site	2021-11-28 10:20:43 +01:00
boards.yml	add support for colorlight-i9+ board + spiOverJtag/spiOverJtag_xc7a50tfgg484.bit.gz	2023-06-30 11:36:32 +02:00
cable.yml	Add WCH CH347T(mode #3) JTAG cable	2023-07-26 08:17:57 +02:00
conf.py	doc/cable: move to yml	2022-02-20 15:47:35 +01:00
data.py	doc/cable: move to yml	2022-02-20 15:47:35 +01:00
index.rst	colognechip integration: update documentation	2021-12-12 18:26:14 +01:00
requirements.txt	doc: declare board compatibility through a YAML file	2022-01-12 03:00:55 +01:00
todo.rst	doc: convert TODO from md to rst	2021-11-28 10:24:07 +01:00