JTAG pinout on Sipeed Slogic16U3 is similar to Sipeed Tang Primier 20K JTAG pinout and
extension cable from Tang Primer 20K can be used.
./openFPGALoader -c digilent_hs2 --detect
empty
Jtag frequency : requested 6.00MHz -> real 6.00MHz
index 0:
idcode 0x1681b
manufacturer Gowin
family GW5AT
model GW5AT-15
irlength 8
Some code used snprintf on std::string objects.
This caused unexpected behaviour where '\0' was printed to the output file.
This commit adds intermediate char* buffer which is later used to
initialize std::string. This string is later resized to the correct
expected length.
Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
Arora V series is a new series of Gowin FPGA, in which the flashing
process has changed.
Add preliminary support by adding FS file line count and deal with the
SRAM writing process. Flash writing is not yet done.
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
- _raw_data is now filled in configBitstreamParser
- source may be a file or a pipe
- displayHeader become a common method (configBitstreamParser)
- improve/rewrite some parser (efinixHexparser 1s -> 11ms)
- first bit in header lines maybe be 0 or 1 depending on crc_check
- data line length depend on crc_check too. Instead of trying to deduce
length, use idcode to have this.
Gwenhael Goavec-Merou
Florent Kermarrec
Maciej Dudek
Alexey Starikovskiy
Icenowy Zheng
Cedric de Wijs
Icenowy Zheng
phdussud
Fabien Marteau