28cbd1faad
spiFlash: workaround for dump > 1M
2021-10-02 19:25:04 +02:00
fe1634897f
part: merge ECP5-12 & ECP5-25 (same idcode)
2021-10-02 15:20:55 +02:00
2e64a52cb5
Merge pull request #118 from UweBonnes/mpsse_toggle
...
ftdiJtagMPSSE: Fix TCK toggle for large numbers.
2021-09-29 06:31:50 +02:00
f9a62b418b
ftdiJtagMPSSE: Fix TCK toggle for large numbers.
2021-09-28 21:06:46 +02:00
8ec009fcea
part.hpp: Fix wrong description of XC95288XL
2021-09-28 12:33:14 +02:00
cee91fa5a1
jedParser: p2
2021-09-25 15:06:47 +02:00
bd903be6b6
jedParser: fix checksum when configuration data size is not multiple of 8bits
2021-09-25 15:06:13 +02:00
36783d74c4
progressBar: Use only stdout.
...
The progress markers of the progress bar were output to stderr while the
rest was output to stdout. Move everything to stdout.
2021-09-20 15:14:23 +02:00
3698b98976
ftdiJtagMPSSE: improve a bit USB transaction
2021-09-18 14:54:40 +02:00
57c0f16be4
ftdipp_mpsse: typo in setClkFreq
2021-09-16 07:41:05 +02:00
85b53b5918
add gowin external spi in bscan and --external-flash option
2021-09-15 20:18:49 +02:00
ae2fcfdca1
main: args. Fix comments for load and write bitstream
2021-09-13 14:10:42 +02:00
b70bd83ced
Merge branch 'trabucayre:master' into master
2021-09-03 08:52:18 +02:00
2ef040774e
fsparser: gw1nsr-4c idcode/nb_line
2021-09-03 07:47:58 +02:00
23cf631b85
fix part name GW1NSR-4 -> GW1NSR-4C
2021-09-02 14:56:22 +02:00
11bdebd884
adding reference to Tang Nano 4K kit in doc
2021-09-02 13:54:34 +02:00
94385a758e
adding IDCODE for GW1NSR, for Tang Nano 4K kit
2021-09-02 13:46:35 +02:00
bb69297ed0
xilinx: with XCF reconfigure FPGA after write
2021-08-30 17:15:45 +02:00
2606bf7017
xilinx/doc: add spartan3 and XCF flash
2021-08-30 15:08:11 +02:00
92a4b9bcd8
jtag: fix idcode mask and display
2021-08-28 16:31:24 +02:00
304ec0071c
mask idcode upper nibble (version in IEEE 1149.1)
2021-08-27 15:10:12 +02:00
faedb0cfd7
lattice: throw exception when program fails
2021-08-23 16:27:28 +02:00
74b8305730
xilinx: test parse return for jedec instead of catch exception
2021-08-20 09:54:43 +02:00
db5d4e75d9
jedParser: fix checksum for xc9500
2021-08-20 09:44:38 +02:00
521c703842
part: add xc95 family idcode
2021-08-18 15:41:39 +02:00
b61884614e
xilinx: add support for XC95 CPLD family
2021-08-18 15:38:49 +02:00
471fbb6a81
jedParser: add xilinx compatibility
2021-08-18 15:38:24 +02:00
274d4ea2dc
main: fix display order for detect
2021-08-18 07:40:25 +02:00
c47b494311
jtag: add access to targeted idcode
2021-08-18 07:39:23 +02:00
630d4428c6
main: DFU mode: pass board vid/pid
2021-07-17 08:36:32 +02:00
cbe2bf5494
dfu: try to open dfu vid/pid, next board vid/pid. without vid/pid download is forbidden. Simplify detection in not enumerate mode. Display iProduct
2021-07-17 08:36:13 +02:00
b8e2939776
board: add vid/pid for DFU at board level
2021-07-17 08:34:44 +02:00
7113f4b36b
part: add Gowin GW1N-2
2021-07-16 07:42:34 +02:00
651fdd8beb
ftdixx: improve workaround for arty. Not required with a classic ft2232
2021-07-14 19:09:39 +02:00
cd64bce4f2
fix warning in Debug mode
2021-07-14 17:59:02 +02:00
be6ed217dd
main: display error message if program fails
2021-07-14 16:39:14 +02:00
1e0a06288d
configBitstreamParser: don't compute reverseByte, use a precomputed table: gain: 200ms for arty @30MHz
2021-07-14 08:44:22 +02:00
cc688d6db6
main: small fix
2021-07-14 08:07:51 +02:00
894cda820f
board: add default frequency option for BITBANG and SPI boards
2021-07-14 08:05:36 +02:00
13af012163
main: avoid potential miss with probe clock frequency
2021-07-14 08:04:43 +02:00
fd329158de
Merge pull request #98 from ultraembedded/master
...
Add board specific default frequency
2021-07-14 07:53:13 +02:00
acf7d2a0a8
ftdiJtagMPSSE: add work around to deal with freq >= 15MHz
2021-07-13 07:00:30 +02:00
594f065116
ftdipp_mpsse: use runtime_error instead of simple exception
2021-07-12 08:05:25 +02:00
f8831f329c
Only use board clock speed if user does not specify an alternate freq
2021-07-11 15:27:46 +01:00
797785ce93
Allow board configuration table to contain a default clock speed (as some boards are known to work at higher speeds safely). Move Digilent Arty to 10MHz (tested).
2021-07-11 15:20:15 +01:00
3983726a66
all devices: use spiFlash dump & verify
2021-07-11 11:34:14 +02:00
f5254294eb
altera: add verify and dump
2021-07-11 11:32:35 +02:00
b77c5a22df
spiFlash: add verify and dump method
2021-07-11 11:32:10 +02:00
f19d0996a4
progressBar: limit resolution
2021-07-11 11:30:02 +02:00
6639f0646a
board: pipistrello: add spi flash support
2021-07-11 08:58:40 +02:00
c90a4b7734
altera: spi flash support for cycloneV and qmtech
2021-07-10 08:20:27 +02:00
0c4aedcb23
altera: add spi flash support for de0nano (EP4CE22F17C6)
2021-07-09 07:40:55 +02:00
c99f5aa4e6
main: update to pass device type and prog type to altera class
2021-07-08 20:54:12 +02:00
84bd19b19a
board: cyc1000: add fpga model
2021-07-08 20:53:20 +02:00
c29fbb15f9
altera: use new epcq interface, add device type and prog type. Now more generic and not specific to cyc1000
2021-07-08 20:52:46 +02:00
0d4b6143b5
epcq,spiFlash: epcq is now a subclass of spiFlash (real different part is power_(up|down) and read_id
2021-07-08 20:51:51 +02:00
f937cb9ab5
Adds support for the xc6slx100fgg484.
...
Tested on a Pano Logic G2.
2021-07-03 05:01:56 -04:00
8068c84ec8
board: add Fomu support
2021-06-29 13:49:33 +02:00
8f95303daf
move to APACHE-2.0 license
2021-06-26 15:24:07 +02:00
b2d2fa0127
ftdipp_mpsse: with 1.5 reatach may be automatic
2021-06-26 15:04:57 +02:00
c1f18cd1d3
jtag: fix unsigned vs signed
2021-06-26 08:47:37 +02:00
98a2e836fa
ice40: add support for verify and dump
2021-06-26 08:43:02 +02:00
fb8f50cb52
ice40: indent
2021-06-26 08:34:41 +02:00
79a0e84f1f
efinix: add support for verify and dump
2021-06-26 08:34:12 +02:00
b92a9adca7
ftdispi: improve write/read
2021-06-26 08:06:26 +02:00
d32b81037a
xilinx: add dumpFlash support
2021-06-25 11:28:19 +02:00
2af64e9af4
all: propagate verify with a message when not supported
2021-06-25 08:58:45 +02:00
fe0a315456
lattice,device: introduce method to dump flash content
2021-06-24 18:20:34 +02:00
c471d25bb5
xilinx,lattice,device: add verify write into flash
2021-06-24 18:08:02 +02:00
b150bbdd23
gowin: checks if fs is targeted for connected device
2021-06-24 08:57:18 +02:00
5e11b3cb67
cmsisDAP: Remove product string check.
2021-06-22 23:59:57 +02:00
7fc0703167
cable: Add support for Orbtrace.
2021-06-22 23:59:46 +02:00
40d9bc3ea7
dirtyJtag: cpplint/cppcheck
2021-06-20 16:39:19 +02:00
0a7fd93a08
dirtyJtag: update _clkHZ with current frequency
2021-06-20 16:28:46 +02:00
8d20c09791
dirtyJtag: fix toggleClk call (TMS is high, TDI depends on last_bit)
2021-06-20 16:28:18 +02:00
26f5dd3ee5
Merge pull request #92 from phdussud/master
...
dirtyJtag optimizations to cut the number of USB requests
2021-06-20 16:26:53 +02:00
827767b99f
add proof of concept / draft for DFU protocol. Add orangeCrab in DFU mode
2021-06-20 10:26:05 +02:00
80f642a0a4
Fix a buffer overflow per code review
2021-06-19 12:39:25 -07:00
cbbac0bff8
Changes per code review.
2021-06-19 09:40:33 -07:00
dddfcbc973
board: add support for colorlight I5
2021-06-19 17:30:47 +02:00
53c5d35da6
add cmsis dap (hid) support
2021-06-19 17:30:23 +02:00
00289503dd
README: add ZedBoard, de0nanoSoc and de10nano support
2021-06-19 15:33:26 +02:00
b4fe045060
fsparser: don't try to analyze header after then end of header area
2021-06-18 13:33:40 +02:00
f84cb403e4
dirtyJtag optimizations to cut the number of USB requests
2021-06-13 11:38:30 -07:00
eaed746cf2
Add a few more Spartan6 based parts and boards (tested on an old miniSpartan6+).
2021-06-13 17:55:56 +01:00
2bf7b255b3
lattice: move directly to run_test_idle with last tx packet in program_mem
2021-06-12 09:27:16 +02:00
2214a7e720
Merge remote-tracking branch 'origin/master' into JTAG_chain
2021-06-12 08:44:18 +02:00
b5f2506fd1
clkHZ: be more generic
2021-06-12 08:40:40 +02:00
dc003f6212
As per feedback, allow 232H devices to have upper bank pins configured on init.
2021-06-11 11:24:57 +01:00
291f1b6d6f
Add support for Digilent Digital Discovery and Analog Discovery 2 (openFPGALoader -c digilent_ad)
2021-06-10 22:38:17 +01:00
3abc591bd5
Add LCMXO2-1200HC
2021-06-06 13:30:13 -07:00
0cae46b367
configBitstreamParser: fix CRLF vs LF: use fread with FILE (or stdin) instead of c++ stream
2021-05-26 17:56:21 +02:00
b28ae236a1
fsparser: drop CR at the end of line
2021-05-26 17:40:16 +02:00
d3a5b712b4
part: cycloneV Soc 5CEMA4 -> 5CSEMA4, add 5CSEBA6 idcode
2021-05-21 12:37:16 +02:00
fc08249630
lattice: don't use read_write
2021-05-18 08:27:34 +02:00
c36d29e5e3
gowin: don't use read_write
2021-05-16 12:13:31 +02:00
a160cc6431
board: add terasic de0nanoSoc
2021-05-15 19:32:49 +02:00
a96fbcc99a
board: add digilent zedboard
2021-05-15 19:31:39 +02:00
ba92456597
part: add zynq 7020
2021-05-15 19:31:20 +02:00
2f38461826
main: fix default args.index_chain
2021-05-15 19:30:45 +02:00
9e260c1e05
xilinx: don't use read_write
2021-05-15 18:43:54 +02:00
181303ce8c
anlogic: don't use read_write
2021-05-15 15:39:37 +02:00
27af85dc19
main: add option to specify device index
2021-05-15 15:26:09 +02:00
acf4ab270c
main: rework fpga detection to allows more than one device in a chain, but only FPGA is allowed
2021-05-15 15:08:27 +02:00
8b34448ed0
jtag: add logic to handle multiple device in JTAG chain
2021-05-15 14:59:06 +02:00
a242168e7f
jtag: shiftxR: don't try to move to shift when not required
2021-05-15 09:05:48 +02:00
5da47a0200
jtag: propagate getClkFreq
2021-05-15 08:46:21 +02:00
3d60cd647f
altera: adapt delay according to clock freq
2021-05-15 08:35:16 +02:00
610a76f653
jtagInterface/cables: introduce getClkFreq
2021-05-15 08:32:51 +02:00
c4e58073c1
part: add irlength and introduce new structure for device not handled (CPU) mainly for irlength
2021-05-14 16:35:26 +02:00
49ba5f265a
add support for usb-blasterII
2021-05-13 16:11:22 +02:00
42b7279a4b
main: add optional probe-firmware
2021-05-13 16:07:40 +02:00
167d430c34
usbBlaster: add a low level to support both usbBlasterI(ftdi) and usbBlasterII(fx2)
2021-05-13 16:06:29 +02:00
dc884b86c8
fx2_ll: cypress fx2 low level
2021-05-13 15:28:00 +02:00
c09bc0662b
ihexParser: new parser for (i)hex files
2021-05-13 12:14:52 +02:00
6ae29125ed
spiFlash: add a workaround for microchip SST26VF032B / SST26VF032BA
2021-05-05 06:59:02 +02:00
c82257c9ba
spiFlash: introduce jedec_id
2021-05-05 06:25:00 +02:00
200bc6364e
fsparser: fix checksum with GW1NS-2C, when configuration data is smaller than theory
2021-04-26 19:28:44 +02:00
e2b40e1350
xilinx: supress useless test in spi_wait
2021-04-22 19:06:36 +02:00
a4ccdae7df
add basys3 support
2021-04-20 21:28:14 +02:00
7039465353
rework xilinx fpga spiOverJtag to respect model/package
2021-04-19 21:17:08 +02:00
65a1e995ec
xilinx: be more verbose when spiOverJtag not available
2021-04-19 21:08:11 +02:00
858d9e6273
add support for Alchitry Au
2021-04-16 21:20:30 +02:00
4defec0db1
add support for artix 7 75t
2021-04-15 15:38:36 +02:00
4e2b1aa73e
cable: add SecuringHardware Tigard programmer
2021-03-27 18:43:56 +01:00
32d3872f69
part.hpp: sort altera cyclone V device by alphabetical order
2021-03-27 18:31:39 +01:00
508635f788
Merge pull request #80 from emard/master
...
recognize altera cyclone V 5CEBA4 FPGA
2021-03-27 18:30:28 +01:00
fa70a9a3b2
part.hpp: sort xilinx device by alphabetical order
2021-03-27 18:25:52 +01:00
52efdab421
recognize altera cyclone V 5CEBA4 FPGA
2021-03-27 02:00:18 +01:00
16f85fff63
add support for kintex xc7k325t
2021-03-24 17:25:05 +01:00
f33d30dbce
main: fix bitbang check: config pins must be the shift value
2021-03-21 18:51:13 +01:00
630a976884
add support for cycloneIII and Terasic DE0 board
2021-03-20 12:23:17 +01:00
ea141fdcfe
Remove spurious files in previous commit
2021-02-27 13:25:22 -08:00
e9b1a2e610
fix for space
2021-02-27 13:19:25 -08:00
6e96d8f6d0
Conditionalization of ftdi_tcioflush
2021-02-27 13:12:21 -08:00
5d8ec9a162
Attempt to satisfy a comment from the owner
2021-02-27 12:45:12 -08:00
fdd1037d46
Remove temporary support for a hypotetical version based on Teensy 4
2021-02-27 11:35:45 -08:00
94ef653682
Resolved bunch of comments from owner
2021-02-27 10:37:07 -08:00
9ee8e84fba
Support for new DirtyJtag2 protocol. Merged with head
2021-02-27 09:59:38 -08:00
43caa612ca
lattice: drop the limitation, for .bin, to write at offset > 0
2021-02-27 06:49:42 +01:00
6d1c51d0a4
fix purge buffer fix libftdi >= 1.5
...
Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
2021-02-25 13:37:33 +01:00
566d33c2f1
progressBar: use chrono instead of clock
2021-02-24 13:31:55 +01:00
16932786db
all parser:
...
- _raw_data is now filled in configBitstreamParser
- source may be a file or a pipe
- displayHeader become a common method (configBitstreamParser)
- improve/rewrite some parser (efinixHexparser 1s -> 11ms)
2021-02-24 06:36:48 +01:00
e27da3276f
Merge pull request #75 from Disasm/add-gw1ns-2c
...
Add support for GW1NS-2C FPGA chips
2021-02-21 18:48:16 +01:00
df52d523bf
All devices: new CLI argument to bypass file type autodetection
2021-02-21 18:30:13 +01:00
d226ab7671
Add support for GW1NS-2C FPGA chips
2021-02-21 17:31:09 +03:00
7cc5676e8e
ftdi: drop divide_by_5 param, now it's automatically set/unset according to the frequency. Better freq display
2021-02-19 07:07:10 +01:00
5f9a8835da
devices: simplify write RAM/Flash
2021-02-18 21:09:34 +01:00
48e65fa0ad
bitparser: drop garbage characters, use _hdr, best header parsing and display
2021-02-17 19:02:57 +01:00
4a555bb102
dfuFileParser: parser for bitstream with DFU suffix
2021-02-15 07:33:58 +01:00
590553e432
src/fsparser: rewrite to use header instead of comments, add support for compressed bitstream
2021-02-12 07:34:14 +01:00
210bdac09a
configBitstreamParser: external access to header keys/values
2021-02-10 08:02:20 +01:00
e91c251eb0
svf_jtag: suppress CR when file is in DOS format
2021-02-08 06:31:56 +01:00
d4692d5049
rawParser: typo
2021-02-06 11:42:50 +01:00
1545b99748
rawParser: use raw_data buffer
2021-02-06 11:36:34 +01:00
f6c036f1c0
anlogicBitParser: use _raw_data and work with this one instead of file descriptor
2021-02-06 11:29:32 +01:00
5c49b1465a
all cable: always display real used frequency
2021-02-05 06:28:19 +01:00
582261c758
xilinx: allow bin file to memory
2021-02-04 07:29:35 +01:00
ad21a3bb36
recast verbose to int8_t to have more level of verbosity (-1 quiet, 0 normal, 1 verbose), add --quiet option, display progress bar when verbosity level >= 0
2021-01-30 07:57:49 +01:00
1992360667
main: catch exception if FPGA can't be claimed.
2021-01-29 06:19:42 +01:00
956d506bf7
fsparser: display warning message for missing or unknown idcode
2021-01-28 07:23:38 +01:00
71c4b32202
display: add warning message
2021-01-28 07:22:24 +01:00
dbc78f8c57
add seeedstudio runber (gowin GW1N-4)
2021-01-28 06:19:43 +01:00
502546fcfc
fsparser: add missing GW1N-4(ES) idcode
2021-01-28 06:07:51 +01:00
60800ee1a6
board: add entry for tec0117
2021-01-25 18:52:54 +01:00
883268be25
efinixHexParser: use _raw_data instead of custom buffer
2021-01-24 18:21:47 +01:00
46beaea14d
configBitstreamParser: introduce a buffer for unprocessed file content
2021-01-24 18:16:09 +01:00
cd625d4c99
add efinix Xyloni support (spi mode only)
2021-01-21 07:11:10 +01:00
0e5e609b34
ftdipp_mpsse: don't configures high bytes for devices with only one bank per channel
2021-01-21 06:57:35 +01:00
717870e18b
Made last_time a private member of the ProgressBar class per code review comment.
2020-12-28 09:33:35 -08:00
11baca9337
limit the progressBar update rate to 5 per second. This speeds up loading of small bin files.
2020-12-26 09:50:48 -08:00
6fefebd02c
prepare release v0.2.1
2020-12-17 13:58:30 +01:00
1b065277f9
add acorn CLE 215+ support
2020-12-17 09:28:45 +01:00
6e44797677
add fairwaves xtrx pro board
2020-12-15 09:47:10 +01:00
54b31651f3
xilinx: since xilinx generates bin file, drop limitation about flash start offset
2020-12-15 09:46:47 +01:00
a11ec92a25
Fix gcc 10.2 error messages.
2020-12-12 15:48:45 -08:00
922d3b0b56
xilinx: add xca50t support
2020-12-08 07:32:30 +01:00
ed7e9340ba
lattice: add a memset to avoid valgrind warn
2020-11-27 08:29:09 +01:00
88522b0e91
ftdiJtagBitbang: quick fix to avoid overflow in writeTDI
2020-11-26 09:26:08 +01:00
bec5e4f35c
add xc7s25 support
2020-11-18 08:15:15 +01:00
14c5b8e681
add support for ice40 FPGA and iCEBreaker, icestick, iCE40-HX8K, iCE40-HX1K-EVN boards
2020-10-31 15:02:54 +01:00
818dbd301c
ftdipp_mpsse: reduce useless write
2020-10-31 11:10:14 +01:00
7e15b5cabb
board: Fireant support
2020-10-31 10:44:44 +01:00
6aa2176be1
board: typo
2020-10-31 10:44:14 +01:00
537f02fa89
board: fix control pins size
2020-10-31 10:43:45 +01:00
14b7122b4d
ftdispi: fix control size
2020-10-31 10:42:40 +01:00
aa23aff388
main: review SPI mode for efinix active mode
2020-10-31 10:41:44 +01:00
70fb5c8439
add efinix support
2020-10-31 10:39:06 +01:00
3c9870bba3
introduce CBUS/DBUS pins value, add macro and pin mapping for board in SPI mode, reset and done signals
2020-10-31 08:40:18 +01:00
fe8cd9998d
board: simplify board definition using preprocessor macro
2020-10-31 08:04:43 +01:00
1bc20fee85
ftdispi: cleanup + fix + add support for wpn and holdn pins
2020-10-31 07:45:30 +01:00
deefcd2d38
ftdipp_mpsse: update direction method
2020-10-31 07:38:06 +01:00
b2abafa76d
ftdispi: start to use spi_pins_conf
2020-10-30 08:26:15 +01:00
e347d2afd6
board: add spi_pins_conf structure
2020-10-30 08:23:49 +01:00
b0f73aa8d9
ftdipp_mpsse: add method to configure individually pins direction
2020-10-30 08:18:38 +01:00
2398ee1445
part: add LCMXO2-640HC
2020-10-29 08:24:30 +01:00
88c6b2ff6d
Improve FTDI communication in bitbang mode
...
sub layer cut package in allowed size, so it's not mandatory to do this
at openFPGALoader level. The only situation when the size is important
is in read mode. So increase buffer size to reduce system calls.
2020-10-29 08:15:32 +01:00
e0a5d376ba
ftdipp_mpsse: change VID/PID visibility
2020-10-29 07:40:56 +01:00
f75a7f8395
ftdiJtagBitbang: some cleanup and reuse parent class buffer
2020-10-29 07:39:47 +01:00
78ea8ac808
ftdipp_mpsse: change _buffer visibility
2020-10-29 07:39:07 +01:00
09c28c23a7
ftdispi: cleanup
2020-10-28 21:26:33 +01:00
05e1c57cc5
ftdipp_mpsse: add method to update pins direction
2020-10-28 19:48:59 +01:00
ed006711b7
ftdipp_mpsse: introduce gpio bitbanging with MPSSE
2020-10-28 07:58:33 +01:00
b3a67f896f
ftdipp_mpsse: store cable configuration
2020-10-27 20:27:02 +01:00
4dde89e082
Merge remote-tracking branch 'origin/review_usb_transaction'
2020-10-27 19:29:44 +01:00
5254116ad8
main: if board has no default cable, don't override potential user choise
2020-10-25 16:51:21 +01:00
f22b25428d
main: allow users board cable to be override
2020-10-21 13:41:26 +02:00
2170a2af86
altera: add support for RBF (only tested with SRAM)
2020-10-17 18:40:16 +02:00
15e9907655
add cycloneV E support and QMTech CycloneV board
2020-10-17 15:45:00 +02:00
717d5065b4
ftdiJtagMPSSE: use correct size for ch552 dummy buffer
2020-10-17 15:44:21 +02:00
04df474e12
Merge pull request #56 from GbGp/master
...
add support for artix-7 200t and nexys video board
2020-10-16 19:10:10 +02:00
a874a51be3
Fix part name typo
2020-10-16 08:08:44 +02:00
fbb8c58f46
Add MachXO3D Development Board Support
2020-10-16 08:03:45 +02:00
edad461d88
add support for artix-7 200t and nexys video board
2020-10-15 16:07:55 +02:00
235505c660
gowin:
...
- increase delay before checking CRC
- fix message
2020-10-12 15:34:50 +02:00
adb6efca39
ftdiJtagMPSSE: don't flush/write everytime
2020-10-09 21:30:45 +02:00
23c9733a6d
gowin: force flush when it's mandatory
2020-10-09 21:29:48 +02:00
da65579d0d
jtag: don't force flush everywhere
2020-10-09 21:28:00 +02:00
06d0e44f71
gowin: eraseFLASH(): fix buffer size, set this to 0
2020-10-09 21:22:03 +02:00
a27c99376d
ftdiJtagMPSSE: don't use MPSSE_DO_WRITE for read only transaction
2020-10-09 21:17:04 +02:00
487bc21d66
Fix fsparser:
...
- first bit in header lines maybe be 0 or 1 depending on crc_check
- data line length depend on crc_check too. Instead of trying to deduce
length, use idcode to have this.
2020-10-09 19:26:50 +02:00
8fb36f9ba9
main: improve flash direct access
2020-10-07 07:47:46 +02:00
588094447f
rawParser: less verbose
2020-10-07 07:47:07 +02:00
522489c860
main: improve previous commit
2020-10-07 07:37:40 +02:00
9e0614d15d
main: fix ftdi_serial default value '' -> '-'. (jadafi)
2020-10-07 06:39:00 +02:00
f77faa2657
add direct access to spi flash
2020-10-06 08:38:24 +02:00
01fbbf747d
ftdispi: force mode 0 by default
2020-10-06 08:36:31 +02:00
221e814509
ftdispi, ecpq: use enum for endianness and cs mode
2020-10-06 08:36:12 +02:00
1a952f466a
Merge pull request #51 from martin2250/master
...
add ftdi serial number argument
2020-10-05 15:29:30 +02:00
090a97baa0
fix line too long
2020-10-05 14:49:42 +02:00
c41f4b597a
fix MACHXO3LF family
2020-09-29 16:13:54 +02:00
99929f99c3
add ftdi serial argument
2020-09-29 14:16:30 +02:00
7b048d2d82
fsparser: fix checksum for gw1n with ram
2020-09-29 08:07:57 +02:00
5d99237652
gowin: Fix flash write message and display checksum when SRAM fail
2020-09-28 16:25:33 +02:00
7d960411c2
board: crosslinknx_evn
2020-09-26 08:47:26 +02:00
6536619b84
add crosslinx and certus support
2020-09-26 08:41:27 +02:00
9572d060e9
lattice: adapt status register to support nexus devices
2020-09-26 08:40:43 +02:00
871e28259e
latticeBitParser: support lattice radiant bit file
2020-09-26 07:58:03 +02:00
d9bbcdf68b
xilinx: support writing .bit file to flash
2020-09-25 18:58:31 +02:00
e8acec9873
fix xilinx to bitparser update
2020-09-25 18:43:05 +02:00
fceaada9ba
bitparser: reverOrder is now configurable, fix _bit_length must be in bit instead of byte
2020-09-25 18:42:32 +02:00
9a8a7400b9
Merge pull request #50 from ronyrus/add_ftdi_channel_param
...
Add FTDI channel selection command line argument.
2020-09-22 18:36:53 +02:00
41f1a7a61a
review fixes: refactoring and readme update
2020-09-22 19:22:51 +03:00
48c747edd6
Add FTDI channel selection command line argument.
2020-09-22 11:45:44 +03:00
9c89c43b4d
xilinx: allow write raw binary file in flash
2020-09-19 09:50:08 +02:00
a220226a9e
usbBlaster: fix read bit align and don't potentially write when just set clk low
2020-09-12 18:13:53 +02:00
1345e6da6d
usbblaster:writeTDI: fix mask and force clk low after last write
2020-09-06 16:44:26 +02:00
3bfd63b987
usbBlaster: init: flush FT245 buffer
2020-09-06 11:01:41 +02:00
f587d7afde
anlogic, lattice, xilinx: fix comparision signed/unsigned
2020-09-05 08:00:58 +02:00
8dace3e2a9
lattice: support writing arbitrary raw binary data somewhere in external flash
2020-09-05 07:55:20 +02:00
800ad1ce2c
rawParser: simple class to read raw binary content with an optional reverse order
2020-09-05 07:49:57 +02:00
ad4dd39cdd
main: pass write mode to anlogic constructor
2020-08-24 08:55:27 +02:00
3349e65079
anlogic: add SPI flash support
2020-08-24 08:54:45 +02:00
bfd7e9b6ed
anlogicBitParser: allows to reverse (or not) bytes
2020-08-24 08:53:30 +02:00
31bc9cf988
spiFlash: drop annoying message in write_enable method
2020-08-24 08:52:00 +02:00
cd124d2830
gowin: add missing stdexcept required by runtime_error
...
fix:
src/gowin.cpp:73:11: error: 'runtime_error' is not a member of 'std'
throw std::runtime_error("both write-flash and write-sram can't be set");
^
src/gowin.cpp:81:10: error: 'runtime_error' is not a member of 'std'
throw std::runtime_error("incompatible file format");
^
2020-08-24 08:16:48 +02:00
4aab60a2e0
ftdispi: implement spiInterface
2020-08-23 17:17:51 +02:00
b3ef97f95e
spiInterface: increase spi_put len param
2020-08-23 17:16:21 +02:00
4bfb764e75
spiFlash: fix base addr, add method to read flash content and (non)volatile registers + cleanup
2020-08-23 17:14:21 +02:00
d64f6f5055
anlogic: add bit file support. SVF conversion is no more required
2020-08-21 14:07:28 +02:00
4a9fcaf1b9
add minimal support for anlogic bit file
2020-08-21 14:01:07 +02:00
e0d763c4b5
add basic support for anlogic eagle s20 FPGA and lichee tang board
2020-08-20 16:59:34 +02:00
c41911d039
introduce anlogic JTAG adapter (tested with sipeed lichee tang
2020-08-20 16:57:25 +02:00
fc503e5b27
usbBlaster: fix build
2020-08-19 17:21:20 +02:00
4a70675ea6
lattice:cppcheck
2020-08-19 17:00:44 +02:00
7e763dcc25
xilinx:cppcheck
2020-08-19 16:57:07 +02:00
2b3c9f0f8f
cppcheck
2020-08-19 16:53:49 +02:00
050aa94b8b
main: delete jtag if someone is wrong
2020-08-19 15:15:37 +02:00
4a3d1b3009
introduce intel usb blaster cable and de0nano board
2020-08-19 15:15:13 +02:00
ced3363ee5
Support Arty S7-50
...
Added Xilinx xc7s50 device to part.hpp; added support for generating
spiOverJtag bitstream file for that device and added bitstream to repo.
Converted xdc file from DOC line endings to native line endings.
2020-08-08 11:42:38 +02:00
75f160ef00
add CLI args to provide pin mapping for bitbang mode (ft232 and ft231x)
2020-08-04 17:36:33 +02:00
16ef55875d
ftdipp_mpsse: fix build failure with gcc 4.8
2020-08-04 16:41:12 +02:00
c86dae6b62
link against winsock system lib rather than implementing ad-hoc ntohs, fix warning about redefined macro on windows
2020-07-25 16:21:27 +10:00
d24c63ec8a
trabucayre/openFPGALoader#38 minor adjustments for MinGW build - use memset instead of bzero, errno_t may be replaced by int, provide ad-hoc ntohs on windows (alternative is link against winsock)
2020-07-25 12:55:41 +10:00
3f4086ec89
cxxopts: fix option_matcher regex
2020-07-24 08:34:44 +02:00
9c42aecef5
replace argp by cxxopts
2020-07-23 18:32:18 +02:00
b6681c5430
adapt and copy cxxopts.hpp from https://github.com/jarro2783/cxxopts
2020-07-23 18:31:53 +02:00
c1741b4300
prepare release 0.1
2020-07-11 08:47:54 +02:00
e95a6a1792
display: use isatty() for (no)color
2020-07-11 07:56:11 +02:00
d85fc68add
main: use printError instead of cerr
2020-07-11 07:47:27 +02:00
447e3e47b2
catch exception when claiming cable
2020-07-11 07:23:24 +02:00
23b8e61bc0
dirtyJtag: add () to fix operator priority
2020-06-24 07:19:15 +02:00
e28dbdfb2f
ftdiJtagMPSSE: read mpsse_write return in toggleClk
2020-06-23 10:13:35 +02:00
d5b3073e78
ftdiJtagMPSSE: drop debug message
2020-06-18 06:49:45 +02:00
27b0c8a664
introduce DirtyJTAG cable
2020-06-14 15:41:00 +02:00
ace902cb98
jtag: call toggleClk instead of playing with TMS
2020-06-14 15:20:47 +02:00
2cadd21f02
ftdiJtagMPSSE: fix toggleClk to use clk toggle instruction only with compatible device
2020-06-14 15:18:22 +02:00
9a10ac4d48
ftdiJtagBitbang: implement toggleClk
2020-06-14 15:05:47 +02:00
275ba38207
restructure hierarchy/abstraction:
...
- jtagInterface as now only two method: one for tms or for tdi, in all
case full buffer is provided and specific code deal with them to write
- jtag: drop read_write logic to jtag probe abstraction
2020-05-31 15:57:21 +02:00
652b3d292e
ftdipp_mpsse: change clkHZ visibility
2020-05-31 15:56:35 +02:00
9b1c0d42e1
Merge pull request #36 from martin2250/master
...
add jtag frequency option
2020-05-26 07:12:08 +02:00
e93034db69
clean up --freq parser
2020-05-25 10:33:09 +02:00
50fa17b62f
gowin: add flash GW1N1 support
...
- eraseFlash need 65 x 32bits for GW1N1, 1 x 32bits for others
- improve flashFlash with delay according to the model
2020-05-23 14:51:48 +02:00
92888956f3
add jtag frequency option
2020-05-21 13:07:20 +02:00
aa752856c3
jtag, ftdiJtagBitbang: improve tms flush and fix data reconstruct in specific conditions
2020-05-19 08:32:43 +02:00
9f9528599e
lattice: add mcs support for extFlash
2020-05-19 07:59:19 +02:00
4b3166e8df
xilinx: update according to mcsParser modifications
2020-05-19 07:58:37 +02:00
64754604f6
mcsParser: length must be in bit. Allows to store data in direct or reverse Byte order
2020-05-19 07:58:08 +02:00
dec69596d3
Merge pull request #33 from jeanthom/ecpix5
...
Add support for ECPIX-5
2020-05-13 10:55:48 +02:00
eeefe48284
Add support for ECPIX-5
2020-05-12 19:09:30 +02:00
8cd6f3fe2c
gowin: fix internal flash
2020-05-12 10:49:58 +02:00
564785c2d1
part: add idcode for LCMX02-7000HC
2020-05-04 13:09:01 +02:00
dcbe9fb740
board: add MachXO2 Breakout Board Evaluation Kit
2020-05-02 09:58:11 +02:00
5cacdf37df
part: add machXO2 LCMXO2-7000HE
2020-05-02 09:57:03 +02:00
4847700b84
lattice: flash EBR when jed has this section
2020-05-02 09:47:41 +02:00
099123277c
jedParser: Note lines may start with N or NOTE
2020-05-02 09:10:44 +02:00
77e95d637c
jedParser: don't always consider STX as first char
2020-05-02 09:08:42 +02:00
3221fd8ee2
jedParser: check if a \r char is present
2020-05-02 08:51:24 +02:00
050a3a3f8d
add Saanlima Pipistrello
2020-04-28 18:22:33 +02:00
e16f92199a
tested with Xilinx spartan6
2020-04-28 18:21:07 +02:00
84b1d86d52
lattice: display status register when loadConfiguration fails
2020-04-28 10:00:55 +02:00
56a81c1d68
lattice: update define, pass data array instead of _jed to Verify method, fix wrong index use
2020-04-27 16:37:05 +02:00
9d8c528c35
jedParser: fix return value when something is wrong
2020-04-24 10:20:25 +02:00
a4e489467e
jedParser: fix checksum
2020-04-24 10:16:57 +02:00
6ec380516c
tab or space indentation, please choose
2020-04-22 20:51:54 +02:00
12d69735eb
main: pass wr sram/mem to lattice constructor and update help
2020-04-22 15:23:38 +02:00
cb66aa6885
lattice: add spiInterface method, split program_flash in two distinct method (one for internal flash and one for external spi flash), add constructor args to select flash or memory with bit file
2020-04-22 15:21:01 +02:00
0409263f87
unlock block if locked before erase/flash
2020-04-21 19:25:35 +02:00
ee4a62e968
xilinx: implement spiInterface and pass this instead of jtag to spiFlash class
2020-04-21 09:08:32 +02:00
95f247a25e
spiFlash: read extented ID only when len != 0
2020-04-21 09:02:48 +02:00
c94f031025
spiFlash: use spiInterface to hide communication details
2020-04-21 09:00:57 +02:00
2245712108
spiInterface: abstract class for SPI xfer
2020-04-21 08:53:52 +02:00
4558f8b395
Fixed ordering to be alphabetical
2020-04-16 10:54:53 +03:00
8a212e9feb
Fixed DangerousPrototype's Bus Blaster support (in JTAGkey mode).
...
The Bus Blaster uses an FT2232H with an on-board CPLD allowing it to
impersonate various JTAG probes.
This did not work until now because JTAGkey uses ADBUS4/GPIOL0 as ~CS
to enable the JTAG buffers on the on-board CPLD.
2020-04-16 05:31:59 +03:00
5a3c78c1c3
fsparser: compute configuration data checksum instead of using the one provided in the comments
2020-03-22 19:16:52 +01:00
a373bf1613
fsparser: use map provided by configBitstreamParser instead of a lot a variable.
2020-03-20 18:55:13 +01:00
232b189286
configBitstreamParser: add map to store file header
2020-03-20 18:01:48 +01:00
d210d2c67e
use libusb_attach_kernel_driver only when OS is Linux
2020-03-17 07:25:26 +01:00
81d8a8494d
Initial Mac OS X support
2020-03-15 08:22:29 +01:00
8f2d6cb1c9
add option to enable/disable udev support
2020-03-14 19:42:07 +01:00
df226e16e9
Merge remote-tracking branch 'origin/ftdi_bitbang'
2020-03-12 07:26:06 +01:00
767add022a
ftdiJtagBitbang: always purge before when changing bitbang mode
2020-03-11 19:26:38 +01:00
a37578bf7a
ftdiJtagBitbang: set latency to 1ms
2020-03-11 19:25:35 +01:00
84c656492a
ftdipp_mpsse: always set RESET mode before configuration
2020-03-11 19:23:57 +01:00
49dc6c7b3e
add ids of more FTDI adapters and lattice devices
2020-03-10 12:20:44 +01:00
e0c19223c0
always pass cable configuration. Check if /dev if empty or not
2020-03-08 16:58:05 +01:00
deb3d0bed2
jtag: re-add lost dev parameter
2020-03-08 07:52:17 +01:00
7f1f11d58d
add ulx2s and LFXP2-8E (lattice XP2)
2020-03-07 18:46:41 +01:00
2a569958d8
typo in cable.hpp (goran-mahovlic)
2020-03-07 14:13:23 +01:00
ffdb3bfbd0
add ulx3s board (to be tested)
2020-03-07 11:53:13 +01:00
972f3f7f0d
add ft231x generic cable
2020-03-07 11:51:52 +01:00
c4f6178733
propagate jtag_pins_conf_t and add support for bitbang mode
2020-03-07 11:44:17 +01:00
e8bff2d2f2
ftdiJtagBitbang: wrapper for bitbanging with ftdi devices
2020-03-07 11:43:18 +01:00
84298839ea
rework board structure to add an optional pin mapping for bitbang mode
2020-03-07 11:00:29 +01:00
706219016e
pass cable_t instead of mpsse_bit_config
2020-03-07 10:56:34 +01:00
f9591b89a7
cable: introduce communication mode (currently only ftdi serial/bitbang
2020-03-07 10:53:31 +01:00
1ef72b0da6
add interface id in mpsse_bit_config.
2020-03-07 07:19:20 +01:00
9c9348f7d0
rename ftdijtag to jtag
...
- drop everything about ftdi
- use jtagInterface to communicate with hardware
- for all class using jtag: rename FtdiJtag -> Jtag
2020-03-06 09:05:57 +01:00
890fc3c767
ftdispi: pass BITMODE_MPSSE to ftdipp_mpsse init
2020-03-06 08:25:43 +01:00
5eb4286cb4
ftdipp_mpsse: init take ftdi mode
2020-03-06 08:24:49 +01:00
7b4902c460
ftdiJtagMPSSE: implementation of jtagInterface for ftdi MPSSE communication
2020-03-05 20:00:33 +01:00
cc9da9cc9c
jtagInterface: introduce abstraction between jtag implementation and hardware
2020-03-05 19:53:35 +01:00
e11e5675ed
add support for Colorlight 5A-75B v7
2020-02-22 21:02:47 +01:00
f87e0991e0
add support for ECP5 LFE5U-25F-6BG256C
2020-02-22 20:59:56 +01:00
d5e696b5c3
add --detect option to display wich FPGA
2020-02-22 20:55:51 +01:00
c15f0611a9
Merge pull request #20 from japm48/patch-1
...
Add support for Arty A7-100T
2020-02-16 18:27:56 +01:00
48d9184397
Add support for Arty A7-100T
2020-02-16 18:07:50 +01:00
849e5751e0
main: catch exception, to finish cleanly
2020-02-16 16:55:37 +01:00
ad50f1a19b
main: calls program() only when a bit_file is provided
2020-02-16 16:53:55 +01:00
6a2489cfac
Merge pull request #18 from japm48/patch-1
...
Print error when no bitfile is specified
2020-02-16 16:51:27 +01:00
2b2806b0b4
Print error when no bitfile is specified
2020-02-16 15:44:28 +01:00
563e748c69
xilinx: fpga model must be used for spiOverJtag bistream selection
2020-02-16 15:06:06 +01:00
50c8d54791
xilinx: fix a random segfault and add progress status for load in sram
2020-02-16 15:03:55 +01:00
52786895d8
make installation directory configurable
2020-02-16 13:41:58 +01:00
1f02fce1c9
xilinx,lattice: drop useless offset in program_mem signature
2020-02-14 15:14:22 +01:00
298c4d184e
jedParser: pass verbose to base class
2020-02-14 15:08:41 +01:00
a9ddbebc0b
board: SeeedStudio Spartan Edge Accelerator Board
2020-02-01 18:08:16 +01:00
0315b3243c
main: allows to have board without default cable
2020-02-01 18:07:42 +01:00
40bdcba161
part: add xilinx spartan7 15
2020-02-01 17:57:46 +01:00
a29cda11f3
add support for digilent hs3 cable
2020-02-01 17:57:20 +01:00
85823d7271
tested with Lattice ECP5 5G Evaluation Board
2020-01-31 22:18:49 +01:00
30552bf01d
part: add support for LFE5UM5G-85F
2020-01-31 22:14:48 +01:00
d4957589c0
latticeBitParser.cpp: parseHeader: force comparison in unsigned char
2020-01-31 22:13:15 +01:00
a86eff6b57
Update cmake according to trabucayre request https://github.com/trabucayre/openFPGALoader/pull/17
2020-01-27 09:47:42 +01:00
Gwenhael Goavec-Merou
Uwe Bonnes
Vegard Storheil Eriksen
Fabien Marteau
Fabien Marteau
ultraembedded
Billy Stevens
phdussud
GEORGIOS KARNAS
emard
Giuseppe Gebbia
phdussud
Vadim Kaushan
Francisco Ayala Le Brun
Martin Pittermann
Rony Kelner
Staf Verhaegen
Ed Bordin
Martin Pittermann
Jean THOMAS
Udi Finkelstein
Vlatko Kosturjak
japm48