6366518ff7
device,ftdiJtagMPSSE,jtag: check/lint happy
2024-03-07 06:58:31 +01:00
33eaf58869
Add faulty MPSEE cmd 8E workaround
2024-01-27 13:02:46 +01:00
59b56bcc95
all jtag cable: no more hardcoding tdi bit with writeTMS
2023-10-29 06:41:39 +01:00
43ae0d8fdd
ftdiJtagMPSSE,jtagInterface: {set|get}{Read|Write}Edge signature
2023-10-29 06:12:09 +01:00
fd8497026a
ftdiJtagMPSSE,jtag,jtagInterface: allows to force read/write edge configuration (useful to mimic SPI through JTAG)
2023-10-24 07:26:19 +02:00
1908ccd83b
make output buffer const
2023-08-29 19:51:41 +03:00
0a9e8a7e4b
src/xx: cppcheck
2023-04-15 08:20:05 +02:00
48126cf84c
src/xx: cable implementation: rework to use cable_t directly
2022-10-15 16:17:32 +02:00
de42f8b239
ftdiJtagMPSSE: add writeTMSTDI method with full tms & tdi buffer. Always return TDO buffer
2022-07-03 21:44:03 +02:00
964c7d6659
ftdi MPSSE / jtag: add option to use neg edge for TDO's sampling
2022-03-11 07:45:48 +01:00
1ab454359f
ftdiJtagMPSSE,ftdipp_mpsse: fix verbose level -> must be an int8_t not uint8_t
2022-01-19 18:42:15 +01:00
d09e5da0ba
colognechip integration: initial commit
...
This commit adds support for the Cologne Chip GateMate FPGA series. Both
Evaluation Board and Programmer Cable are supported. Configurations can be
loaded into the FPGA with both devices via JTAG or SPI. In addition to
reading/writing data from/to flashes directly via SPI, this can also be done
via the built-in JTAG-SPI-bypass. A direct wiring between programming hardware
and flash is no longer necessary in this case.
Signed-off-by: Patrick Urban <patrick.urban@web.de>
2021-12-10 12:12:32 +01:00
952084cd1d
all jtag interface: don't convert verbosity level to bool
2021-11-11 17:42:51 +01:00
fb6a3b9f03
all cables: writeTMS len int -> uint32_t
2021-11-06 10:31:00 +01:00
acf7d2a0a8
ftdiJtagMPSSE: add work around to deal with freq >= 15MHz
2021-07-13 07:00:30 +02:00
8f95303daf
move to APACHE-2.0 license
2021-06-26 15:24:07 +02:00
b5f2506fd1
clkHZ: be more generic
2021-06-12 08:40:40 +02:00
7cc5676e8e
ftdi: drop divide_by_5 param, now it's automatically set/unset according to the frequency. Better freq display
2021-02-19 07:07:10 +01:00
99929f99c3
add ftdi serial argument
2020-09-29 14:16:30 +02:00
275ba38207
restructure hierarchy/abstraction:
...
- jtagInterface as now only two method: one for tms or for tdi, in all
case full buffer is provided and specific code deal with them to write
- jtag: drop read_write logic to jtag probe abstraction
2020-05-31 15:57:21 +02:00
1ef72b0da6
add interface id in mpsse_bit_config.
2020-03-07 07:19:20 +01:00
7b4902c460
ftdiJtagMPSSE: implementation of jtagInterface for ftdi MPSSE communication
2020-03-05 20:00:33 +01:00
Gwenhael Goavec-Merou
jgroman
Gwenhael Goavec-Merou
Alexey Starikovskiy
Patrick Urban
Martin Pittermann