Gwenhael Goavec-Merou
1f5d6cb373
xilinx: rework error message for zynqXX in SPI_MODE
2023-06-01 20:33:27 +02:00
Gwenhael Goavec-Merou
cd8a143164
DATA_DIR override with environment variable ( #333 )
2023-04-17 20:55:10 +02:00
Gwenhael Goavec-Merou
0a9e8a7e4b
src/xx: cppcheck
2023-04-15 08:20:05 +02:00
Maik Ender
4161c79920
Add Support for Xilinx KCU116 ( #322 )
...
* initial kcu116 support
* add kintex ultrascale plus family to xilinx.cpp
* add docs
* combine xcku and xcvu check
* rebuild bitstream for -1 speedgrade
2023-03-09 20:48:19 +01:00
hycrypt
3d9717f7c3
add the skip_load_bridge and skip_reset arguments also for Xilinx devices
2023-03-03 11:18:08 +01:00
AEW2015
fe0f0ac0c0
Artix+ AU25P support for Opal Kelly Board
2023-02-28 14:24:49 -07:00
Jiajie Chen
49ae479833
Add flash support for VCU128
...
VCU128 does not have secondary flash.
2023-02-22 09:51:16 +08:00
Jiajie Chen
f54781471b
Add initial support for VCU128
2023-02-19 18:39:14 +08:00
Ricardo Barbedo
090a16656d
Only delete bitstream objects if non-null
2023-02-07 10:30:28 +01:00
Ricardo Barbedo
beb93d8321
Replace the string arguments usage with a bitfield
2023-02-06 15:17:53 +01:00
Ricardo Barbedo
0536ab4754
Add target-flash and secondary-bitstream CLI options for VCU118
2023-02-06 11:23:10 +01:00
Ricardo Barbedo
ad9ad539ff
Add support for XCVU9P IR length and codes
2023-01-21 14:45:50 +01:00
Ricardo Barbedo
0855efb29f
Add initial support for the VCU118 board
2022-12-11 22:11:50 +01:00
Gwenhael Goavec-Merou
fb8c1a5f97
altera,intel: adding an option to bypass spiOverJtag automatic bitstream selection by providing the bitstream file path
2022-12-10 22:05:37 +01:00
Gwenhael Goavec-Merou
13fa66bc22
src/xilinx: zynqXX: load only ( #268 )
2022-11-20 17:08:49 +01:00
Greg Davill
53e72a944a
pathHelper: Only compile on win builds
2022-10-23 18:52:47 +10:30
Greg Davill
74ac8bba24
msys2: Fix absolute windows paths
...
- Ensure path DATA_DIR isn't made absolute during compilation
- Use cygpath to create absolute path at runtime
2022-10-23 13:10:45 +10:30
Gwenhael Goavec-Merou
6a00466137
xilinx: flow_program/xc95: verify write: replace hardcoded number of sections by nb_section
2022-08-04 08:15:29 +02:00
Gwenhael Goavec-Merou
c6d79ec2e8
xilinx: flow_program/xc95: increase delay and use getClkFreq (issue #104 )
2022-08-04 08:08:01 +02:00
Gwenhael Goavec-Merou
08c460135e
xilinx: fix wait until done for spartan3e
2022-04-02 11:53:46 +02:00
Sylvain Munaut
7a5284212b
part: Add support for Kintex Ultrascale XCKU040
...
Signed-off-by: Sylvain Munaut <tnt@asuka.home.246tnt.com>
2022-03-29 10:40:52 +02:00
Gwenhael Goavec-Merou
9243a21fe2
xilinx: adapts flow_disable/flow_enable for xc3s, adding custom method to load bitstream for xc3s
2022-03-27 18:11:31 +02:00
Gwenhael Goavec-Merou
b4ffe4bf66
xilinx: fix typo
2022-01-24 18:58:32 +01:00
Gwenhael Goavec-Merou
f44f92ea4b
xilinx: adding zynqmp support and a method to init this family of devices
2022-01-13 08:41:38 +01:00
Gwenhael Goavec-Merou
45f7f72030
all devices: add support to (un)protect flash, implement pre/post flash access. Use new spiInterface methods
2021-12-22 19:11:35 +01:00
Gwenhael Goavec-Merou
37abf105aa
xilinx: use gz file by default
2021-12-19 17:34:14 +01:00
Gwenhael Goavec-Merou
3730e8189d
spiFlash: extract status register display from read_status_reg
2021-10-19 07:06:46 +02:00
Gwenhael Goavec-Merou
4c2a091ab1
xilinx: introduce coolrunner-II support
2021-10-06 08:46:00 +02:00
Uwe Bonnes
f6dfee2db0
xilinx: Adapt wait times with JTAG frequency.
...
Allowed frequency is up to 10 MHz according to xc95XXXxl_1532.bsd
2021-10-03 17:37:28 +02:00
Gwenhael Goavec-Merou
bb69297ed0
xilinx: with XCF reconfigure FPGA after write
2021-08-30 17:15:45 +02:00
Gwenhael Goavec-Merou
2606bf7017
xilinx/doc: add spartan3 and XCF flash
2021-08-30 15:08:11 +02:00
Gwenhael Goavec-Merou
304ec0071c
mask idcode upper nibble (version in IEEE 1149.1)
2021-08-27 15:10:12 +02:00
Gwenhael Goavec-Merou
74b8305730
xilinx: test parse return for jedec instead of catch exception
2021-08-20 09:54:43 +02:00
Gwenhael Goavec-Merou
b61884614e
xilinx: add support for XC95 CPLD family
2021-08-18 15:38:49 +02:00
Gwenhael Goavec-Merou
3983726a66
all devices: use spiFlash dump & verify
2021-07-11 11:34:14 +02:00
Gwenhael Goavec-Merou
8f95303daf
move to APACHE-2.0 license
2021-06-26 15:24:07 +02:00
Gwenhael Goavec-Merou
d32b81037a
xilinx: add dumpFlash support
2021-06-25 11:28:19 +02:00
Gwenhael Goavec-Merou
c471d25bb5
xilinx,lattice,device: add verify write into flash
2021-06-24 18:08:02 +02:00
Gwenhael Goavec-Merou
9e260c1e05
xilinx: don't use read_write
2021-05-15 18:43:54 +02:00
Gwenhael Goavec-Merou
e2b40e1350
xilinx: supress useless test in spi_wait
2021-04-22 19:06:36 +02:00
Gwenhael Goavec-Merou
7039465353
rework xilinx fpga spiOverJtag to respect model/package
2021-04-19 21:17:08 +02:00
Gwenhael Goavec-Merou
65a1e995ec
xilinx: be more verbose when spiOverJtag not available
2021-04-19 21:08:11 +02:00
Gwenhael Goavec-Merou
16932786db
all parser:
...
- _raw_data is now filled in configBitstreamParser
- source may be a file or a pipe
- displayHeader become a common method (configBitstreamParser)
- improve/rewrite some parser (efinixHexparser 1s -> 11ms)
2021-02-24 06:36:48 +01:00
Gwenhael Goavec-Merou
df52d523bf
All devices: new CLI argument to bypass file type autodetection
2021-02-21 18:30:13 +01:00
Gwenhael Goavec-Merou
5f9a8835da
devices: simplify write RAM/Flash
2021-02-18 21:09:34 +01:00
Gwenhael Goavec-Merou
582261c758
xilinx: allow bin file to memory
2021-02-04 07:29:35 +01:00
Gwenhael Goavec-Merou
ad21a3bb36
recast verbose to int8_t to have more level of verbosity (-1 quiet, 0 normal, 1 verbose), add --quiet option, display progress bar when verbosity level >= 0
2021-01-30 07:57:49 +01:00
Gwenhael Goavec-Merou
54b31651f3
xilinx: since xilinx generates bin file, drop limitation about flash start offset
2020-12-15 09:46:47 +01:00
Gwenhael Goavec-Merou
d9bbcdf68b
xilinx: support writing .bit file to flash
2020-09-25 18:58:31 +02:00
Gwenhael Goavec-Merou
e8acec9873
fix xilinx to bitparser update
2020-09-25 18:43:05 +02:00