* CFG_FAILED signal is no longer inverted
* minor fix in CFG_MD settings in doc/vendors/colognechip.rst
* update evaluation board URL
Signed-off-by: Patrick Urban <patrick.urban@web.de>
This commit adds support for the Cologne Chip GateMate FPGA series. Both
Evaluation Board and Programmer Cable are supported. Configurations can be
loaded into the FPGA with both devices via JTAG or SPI. In addition to
reading/writing data from/to flashes directly via SPI, this can also be done
via the built-in JTAG-SPI-bypass. A direct wiring between programming hardware
and flash is no longer necessary in this case.
Signed-off-by: Patrick Urban <patrick.urban@web.de>
Marcus Andrade
Cedric de Wijs
Gwenhael Goavec-Merou
Dennis Gnad
Patrick Urban
umarcor