Commit Graph

8 Commits

Author SHA1 Message Date
Stéphane Chevigny 2ed5eb5eec Rename 5cefa5f23 to 5ce523, add documentation for board and fpga 2022-03-13 09:14:52 -04:00
Gwenhael Goavec-Merou 03769be937 spiOverJtag: Xilinx Spartan6 LX150T 2022-03-03 15:36:11 +01:00
Rod Whitby 18a24c65ea Add spiOverJtag support for Xilinx xc7k325tffg676 part. 2022-02-19 13:14:50 +10:30
TG 89e1fb89d2 doc: add Cyclone V SE SoC FPGA to the supported parts 2022-02-09 18:40:16 +01:00
Verneri Hirvonen 977900954e part: add GW1NZ-1 2022-01-27 22:55:21 +02:00
Icenowy Zheng dc4a454b94 gowin: add support for GW1NR-9C
GW1NR-9C has a different idcode with GW1NR-9.

Add support for it by adding the idcode.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
2022-01-22 20:49:35 +08:00
Gwenhael Goavec-Merou 2d4c634b80 doc/FPGAs: ice40 memory support 2022-01-19 18:59:02 +01:00
umarcor 7fcc9b7d2c doc: declare FPGA compatibility list through YAML file 2022-01-17 23:21:23 +01:00