1f59dfd671
jtag: improving jtag chain detection: now searching for masked and unmasked idcode
2022-01-13 07:34:00 +01:00
796483f61f
jtag: fix shiftIR: bypass_after must be computed in all case
2022-01-09 15:38:37 +01:00
e4971897d7
jtag: ckeck highest nibble to prevent confusion between Cologne Chip GateMate and Efinix Trion T4/T8 devices
2021-12-11 16:35:30 +01:00
d09e5da0ba
colognechip integration: initial commit
...
This commit adds support for the Cologne Chip GateMate FPGA series. Both
Evaluation Board and Programmer Cable are supported. Configurations can be
loaded into the FPGA with both devices via JTAG or SPI. In addition to
reading/writing data from/to flashes directly via SPI, this can also be done
via the built-in JTAG-SPI-bypass. A direct wiring between programming hardware
and flash is no longer necessary in this case.
Signed-off-by: Patrick Urban <patrick.urban@web.de>
2021-12-10 12:12:32 +01:00
952084cd1d
all jtag interface: don't convert verbosity level to bool
2021-11-11 17:42:51 +01:00
f843dc2eb2
ch552_jtag: driver for ch552_jtag firmware (ft2232c clone)
2021-11-06 10:33:25 +01:00
abef1f4968
add verbose-level args: -1 quiet, 0 normal mode, 1 verbose, 2 debug lowlevel
2021-10-03 08:22:35 +02:00
92a4b9bcd8
jtag: fix idcode mask and display
2021-08-28 16:31:24 +02:00
304ec0071c
mask idcode upper nibble (version in IEEE 1149.1)
2021-08-27 15:10:12 +02:00
8f95303daf
move to APACHE-2.0 license
2021-06-26 15:24:07 +02:00
c1f18cd1d3
jtag: fix unsigned vs signed
2021-06-26 08:47:37 +02:00
53c5d35da6
add cmsis dap (hid) support
2021-06-19 17:30:23 +02:00
8b34448ed0
jtag: add logic to handle multiple device in JTAG chain
2021-05-15 14:59:06 +02:00
a242168e7f
jtag: shiftxR: don't try to move to shift when not required
2021-05-15 09:05:48 +02:00
42b7279a4b
main: add optional probe-firmware
2021-05-13 16:07:40 +02:00
da65579d0d
jtag: don't force flush everywhere
2020-10-09 21:28:00 +02:00
99929f99c3
add ftdi serial argument
2020-09-29 14:16:30 +02:00
c41911d039
introduce anlogic JTAG adapter (tested with sipeed lichee tang
2020-08-20 16:57:25 +02:00
4a3d1b3009
introduce intel usb blaster cable and de0nano board
2020-08-19 15:15:13 +02:00
d24c63ec8a
trabucayre/openFPGALoader#38 minor adjustments for MinGW build - use memset instead of bzero, errno_t may be replaced by int, provide ad-hoc ntohs on windows (alternative is link against winsock)
2020-07-25 12:55:41 +10:00
27b0c8a664
introduce DirtyJTAG cable
2020-06-14 15:41:00 +02:00
ace902cb98
jtag: call toggleClk instead of playing with TMS
2020-06-14 15:20:47 +02:00
275ba38207
restructure hierarchy/abstraction:
...
- jtagInterface as now only two method: one for tms or for tdi, in all
case full buffer is provided and specific code deal with them to write
- jtag: drop read_write logic to jtag probe abstraction
2020-05-31 15:57:21 +02:00
aa752856c3
jtag, ftdiJtagBitbang: improve tms flush and fix data reconstruct in specific conditions
2020-05-19 08:32:43 +02:00
e0c19223c0
always pass cable configuration. Check if /dev if empty or not
2020-03-08 16:58:05 +01:00
deb3d0bed2
jtag: re-add lost dev parameter
2020-03-08 07:52:17 +01:00
c4f6178733
propagate jtag_pins_conf_t and add support for bitbang mode
2020-03-07 11:44:17 +01:00
706219016e
pass cable_t instead of mpsse_bit_config
2020-03-07 10:56:34 +01:00
1ef72b0da6
add interface id in mpsse_bit_config.
2020-03-07 07:19:20 +01:00
9c9348f7d0
rename ftdijtag to jtag
...
- drop everything about ftdi
- use jtagInterface to communicate with hardware
- for all class using jtag: rename FtdiJtag -> Jtag
2020-03-06 09:05:57 +01:00
Gwenhael Goavec-Merou
Patrick Urban
Martin Pittermann
Ed Bordin