introduce anlogic JTAG adapter (tested with sipeed lichee tang
This commit is contained in:
Gwenhael Goavec-Merou
parent
fc503e5b27
commit
c41911d039
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@ -40,6 +40,7 @@ if(USE_PKGCONFIG)
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endif()
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set(OPENFPGALOADER_SOURCE
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src/anlogicCable.cpp
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src/dirtyJtag.cpp
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src/spiFlash.cpp
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src/usbBlaster.cpp
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@ -68,6 +69,7 @@ set(OPENFPGALOADER_SOURCE
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set(OPENFPGALOADER_HEADERS
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src/altera.hpp
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src/anlogicCable.hpp
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src/cxxopts.hpp
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src/dirtyJtag.hpp
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src/progressBar.hpp
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@ -34,6 +34,7 @@ detect correct model for flash programming.
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__Supported cables:__
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* anlogic JTAG adapter
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* [digilent_hs2](https://store.digilentinc.com/jtag-hs2-programming-cable/): jtag programmer cable from digilent
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* [DirtyJTAG](https://github.com/jeanthom/DirtyJTAG): JTAG probe firmware for STM32F1
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* Intel USB Blaster: jtag programmer cable from intel/altera
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@ -0,0 +1,294 @@
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/*
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* Copyright (C) 2020 Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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#include <libusb.h>
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#include <stdio.h>
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#include <string.h>
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#include <iostream>
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#include <map>
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#include <vector>
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#include <string>
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#include "anlogicCable.hpp"
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#include "display.hpp"
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using namespace std;
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#define ANLOGICCABLE_VID 0x0547
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#define ANLOGICCABLE_PID 0x1002
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#define ANLOGICCABLE_CONF_EP 0x08
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#define ANLOGICCABLE_WRITE_EP 0x06
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#define ANLOGICCABLE_READ_EP 0x82
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#define ANLOGICCABLE_FREQ_CMD 0x01
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enum analogicCablePin {
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ANLOGICCABLE_TCK_PIN = (1 << 2),
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ANLOGICCABLE_TDI_PIN = (1 << 1),
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ANLOGICCABLE_TMS_PIN = (1 << 0)
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};
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enum analogicCableFreq {
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ANLOGICCABLE_FREQ_6M = 0,
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ANLOGICCABLE_FREQ_3M = 0x4,
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ANLOGICCABLE_FREQ_2M = 0x8,
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ANLOGICCABLE_FREQ_1M = 0x14,
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ANLOGICCABLE_FREQ_600K = 0x24,
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ANLOGICCABLE_FREQ_400K = 0x38,
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ANLOGICCABLE_FREQ_200K = 0x70,
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ANLOGICCABLE_FREQ_100K = 0xe8,
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ANLOGICCABLE_FREQ_90K = 0xff
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};
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AnlogicCable::AnlogicCable(uint32_t clkHZ, bool verbose):
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_verbose(verbose),
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dev_handle(NULL), usb_ctx(NULL), _tdi(0), _tms(0)
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{
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int ret;
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if (libusb_init(&usb_ctx) < 0) {
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cerr << "libusb init failed" << endl;
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throw std::exception();
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}
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dev_handle = libusb_open_device_with_vid_pid(usb_ctx,
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ANLOGICCABLE_VID, ANLOGICCABLE_PID);
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if (!dev_handle) {
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cerr << "fails to open device" << endl;
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libusb_exit(usb_ctx);
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throw std::exception();
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}
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ret = libusb_claim_interface(dev_handle, 0);
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if (ret) {
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cerr << "libusb error while claiming DirtyJTAG interface #0" << endl;
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libusb_close(dev_handle);
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libusb_exit(usb_ctx);
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throw std::exception();
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}
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if (clkHZ > 6000000) {
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printInfo("Anlogic JTAG probe limited to 6MHz");
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clkHZ = 6000000;
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}
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if (setClkFreq(clkHZ) < 0) {
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cerr << "Fail to set frequency" << endl;
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throw std::exception();
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}
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}
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AnlogicCable::~AnlogicCable()
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{
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if (dev_handle)
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libusb_close(dev_handle);
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if (usb_ctx)
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libusb_exit(usb_ctx);
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}
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int AnlogicCable::setClkFreq(uint32_t clkHZ)
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{
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int actual_length;
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int ret;
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uint8_t buf[] = {ANLOGICCABLE_FREQ_CMD, 0};
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if (clkHZ >= 6000000)
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buf[1] = ANLOGICCABLE_FREQ_6M;
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else if (clkHZ >= 3000000)
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buf[1] = ANLOGICCABLE_FREQ_3M;
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else if (clkHZ >= 1000000)
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buf[1] = ANLOGICCABLE_FREQ_1M;
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else if (clkHZ >= 600000)
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buf[1] = ANLOGICCABLE_FREQ_600K;
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else if (clkHZ >= 400000)
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buf[1] = ANLOGICCABLE_FREQ_400K;
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else if (clkHZ >= 200000)
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buf[1] = ANLOGICCABLE_FREQ_200K;
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else if (clkHZ >= 100000)
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buf[1] = ANLOGICCABLE_FREQ_100K;
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else if (clkHZ >= 90000)
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buf[1] = ANLOGICCABLE_FREQ_90K;
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ret = libusb_bulk_transfer(dev_handle, ANLOGICCABLE_CONF_EP,
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buf, 2, &actual_length, 1000);
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if (ret < 0) {
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cerr << "setClkFreq: usb bulk write failed " << ret << endl;
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return -EXIT_FAILURE;
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}
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return clkHZ;
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}
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int AnlogicCable::writeTMS(uint8_t *tms, int len, bool flush_buffer)
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{
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(void) flush_buffer;
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if (len == 0)
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return 0;
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uint8_t buf[512];
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uint8_t mask = (ANLOGICCABLE_TCK_PIN << 4);
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int full_len = len;
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uint8_t *tx_ptr = tms;
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while (full_len > 0) {
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/* when len > buffer capacity -> limit to capacity
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* else use len
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*/
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int xfer_len = (full_len > 512) ? 512 : full_len;
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for (int i = 0; i < xfer_len; i++) {
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buf[i] = mask;
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if (tx_ptr[i >> 3] & (1 << (i & 0x07)))
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buf[i] |= (ANLOGICCABLE_TMS_PIN |
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(ANLOGICCABLE_TMS_PIN << 4));
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}
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/* when last burst, complite rest of buffer with
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* fixed state
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*/
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if (xfer_len < 512) {
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memset(&buf[xfer_len], buf[xfer_len-1] | ANLOGICCABLE_TCK_PIN,
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512-xfer_len);
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}
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if (write(buf, NULL, 512, 0) < 0)
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return -EXIT_FAILURE;
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full_len -= xfer_len;
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tx_ptr += xfer_len;
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}
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return len;
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}
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int AnlogicCable::toggleClk(uint8_t tms, uint8_t tdi, uint32_t clk_len)
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{
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uint8_t buf[512];
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uint8_t mask = ((tms) ? ANLOGICCABLE_TMS_PIN : 0) |
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((tdi) ? ANLOGICCABLE_TDI_PIN : 0);
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mask |= (((mask & 0x0f) << 4) | ((ANLOGICCABLE_TCK_PIN << 4)));
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uint8_t last = mask | ANLOGICCABLE_TCK_PIN;
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int len = clk_len;
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while (len > 0) {
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/* when len > buffer capacity -> limit to capacity
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* else use len
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*/
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int xfer_len = (len > 512) ? 512 : len;
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/* since value is always the same
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* fill xfer_len byte with the same value
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*/
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memset(buf, mask, xfer_len);
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/* when last burst, complite rest of buffer with
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* fixed state
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*/
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if (xfer_len < 512)
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memset(&buf[xfer_len], last, 512-xfer_len);
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if (write(buf, NULL, 512, 0) < 0)
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return -EXIT_FAILURE;
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len -= xfer_len;
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}
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return EXIT_SUCCESS;
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}
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int AnlogicCable::flush()
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{
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return 0;
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}
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int AnlogicCable::writeTDI(uint8_t *tx, uint8_t *rx, uint32_t len, bool end)
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{
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uint8_t buf[512];
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uint8_t mask = (ANLOGICCABLE_TCK_PIN << 4);
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int full_len = len;
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uint8_t *tx_ptr = tx;
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uint8_t *rx_ptr = rx;
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while (full_len > 0) {
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/* when len > buffer capacity -> limit to capacity
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* else use len
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*/
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int xfer_len = (full_len > 512) ? 512 : full_len;
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if (!tx) {
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memset(buf, mask, xfer_len);
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} else {
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for (int i = 0; i < xfer_len; i++) {
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buf[i] = mask;
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if (tx_ptr[i >> 3] & (1 << (i & 0x07)))
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buf[i] |= (ANLOGICCABLE_TDI_PIN |
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(ANLOGICCABLE_TDI_PIN << 4));
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}
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tx_ptr += (xfer_len >> 3);
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}
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/* when last burst, complite rest of buffer with
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* fixed state
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*/
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if (xfer_len < 512) {
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if (end) { /* set TMS high with the last bit */
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buf[xfer_len-1] |= ((ANLOGICCABLE_TMS_PIN << 4) |
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(ANLOGICCABLE_TMS_PIN));
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}
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memset(&buf[xfer_len], buf[xfer_len-1] | ANLOGICCABLE_TCK_PIN,
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512-xfer_len);
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}
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if (write(buf, (rx)?rx_ptr:NULL, 512, xfer_len) < 0)
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return -EXIT_FAILURE;
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if (rx) {
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rx_ptr += (xfer_len >> 3);
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}
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full_len -= xfer_len;
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}
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return EXIT_SUCCESS;
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}
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int AnlogicCable::write(uint8_t *in_buf, uint8_t *out_buf, int len, int rd_len)
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{
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int actual_length;
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int ret = libusb_bulk_transfer(dev_handle, ANLOGICCABLE_WRITE_EP,
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in_buf, len, &actual_length, 1000);
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if (ret < 0) {
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cerr << "write: usb bulk write failed " << ret << endl;
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return -EXIT_FAILURE;
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}
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/* all write must be followed by a read */
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ret = libusb_bulk_transfer(dev_handle, ANLOGICCABLE_READ_EP,
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in_buf, len, &actual_length, 1000);
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if (ret < 0) {
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cerr << "write: usb bulk read failed " << ret << endl;
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return -EXIT_FAILURE;
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}
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if (out_buf) {
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for (int i = 0; i < rd_len; i++) {
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out_buf[i >> 3] >>= 1;
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if ((in_buf[i] >> 4) & 0x01)
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out_buf[i >> 3] |= 0x80;
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}
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}
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return len;
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}
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@ -0,0 +1,69 @@
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/*
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* Copyright (C) 2020 Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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#ifndef SRC_ANLOGICCABLE_HPP_
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#define SRC_ANLOGICCABLE_HPP_
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#include <libusb.h>
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#include "jtagInterface.hpp"
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/*!
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* \file AnlogicCable.hpp
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* \class AnlogicCable
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* \brief concrete class between jtag implementation and anlogic cable
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* \author Gwenhael Goavec-Merou
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*/
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class AnlogicCable : public JtagInterface {
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public:
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AnlogicCable(uint32_t clkHZ, bool verbose);
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virtual ~AnlogicCable();
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int setClkFreq(uint32_t clkHZ) override;
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int setClkFreq(uint32_t clkHZ, char use_divide_by_5) override {
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(void)use_divide_by_5; return setClkFreq(clkHZ);}
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/* TMS */
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int writeTMS(uint8_t *tms, int len, bool flush_buffer) override;
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/* TDI */
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int writeTDI(uint8_t *tx, uint8_t *rx, uint32_t len, bool end) override;
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/* clk */
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int toggleClk(uint8_t tms, uint8_t tdi, uint32_t clk_len) override;
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/*!
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* \brief return internal buffer size (in byte).
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* \return _buffer_size divided by 2 (two byte for clk) and divided by 8 (one
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* state == one byte)
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*/
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int get_buffer_size() override { return 0;}
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bool isFull() override { return false;}
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int flush() override;
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private:
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bool _verbose;
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int write(uint8_t *in_buf, uint8_t *out_buf, int len, int rd_len);
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libusb_device_handle *dev_handle;
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libusb_context *usb_ctx;
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uint8_t _tdi;
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uint8_t _tms;
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};
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#endif // SRC_ANLOGICCABLE_HPP_
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@ -10,10 +10,11 @@
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* \brief define type of communication
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*/
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enum {
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MODE_FTDI_BITBANG = 0, /*! used with ft232RL/ft231x */
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MODE_FTDI_SERIAL = 1, /*! ft2232, ft232H */
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MODE_DIRTYJTAG = 2, /*! JTAG probe firmware for STM32F1 */
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MODE_USBBLASTER = 3 /*! JTAG probe firmware for USBBLASTER */
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MODE_ANLOGICCABLE = 0, /*! JTAG probe from Anlogic */
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MODE_FTDI_BITBANG = 1, /*! used with ft232RL/ft231x */
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MODE_FTDI_SERIAL = 2, /*! ft2232, ft232H */
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MODE_DIRTYJTAG = 3, /*! JTAG probe firmware for STM32F1 */
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MODE_USBBLASTER = 4 /*! JTAG probe firmware for USBBLASTER */
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} communication_type_t;
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typedef struct {
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@ -24,6 +25,7 @@ typedef struct {
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static std::map <std::string, cable_t> cable_list = {
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// last 4 bytes are ADBUS7-0 value, ADBUS7-0 direction, ACBUS7-0 value, ACBUS7-0 direction
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// some cables requires explicit values on some of the I/Os
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{"anlogicCable", {MODE_ANLOGICCABLE, {}}},
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{"bus_blaster", {MODE_FTDI_SERIAL, {0x0403, 0x6010, INTERFACE_A, 0x08, 0x1B, 0x08, 0x0B}}},
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{"bus_blaster_b",{MODE_FTDI_SERIAL, {0x0403, 0x6010, INTERFACE_B, 0x08, 0x0B, 0x08, 0x0B}}},
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{"digilent", {MODE_FTDI_SERIAL, {0x0403, 0x6010, INTERFACE_A, 0xe8, 0xeb, 0x00, 0x60}}},
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@ -24,6 +24,7 @@
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#include <string.h>
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#include <string>
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#include "anlogicCable.hpp"
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#include "display.hpp"
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#include "jtag.hpp"
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#include "ftdipp_mpsse.hpp"
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@ -95,6 +96,9 @@ void Jtag::init_internal(cable_t &cable, const string &dev,
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const jtag_pins_conf_t *pin_conf, uint32_t clkHZ)
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{
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switch (cable.type) {
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case MODE_ANLOGICCABLE:
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_jtag = new AnlogicCable(clkHZ, _verbose);
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break;
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case MODE_FTDI_BITBANG:
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if (pin_conf == NULL)
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throw std::exception();
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