Gwenhael Goavec-Merou
0e0bfc2517
main: SPI mode: added select between ice40 and ecp5 in SSPI when manufacturer is lattice
2025-06-13 15:36:27 +02:00
Gwenhael Goavec-Merou
16b7171039
board: in SPI mode added fpga part/model (required for ice40 vs ecp5)
2025-06-08 08:31:45 +02:00
Gwenhael Goavec-Merou
dbc46cdaff
latticeSSPI: new Driver to access Lattice ECP5 via Slave SPI
2025-06-07 17:28:38 +02:00
Gwenhael Goavec-Merou
765ed526e3
spiFlash: dump: honour _verbose level
2025-06-04 21:38:00 +02:00
Gwenhael Goavec-Merou
32f744979c
ice40: uses verbose_level for SPIFlash instead of verbose/quiet ( #555 )
2025-06-03 11:26:38 +02:00
Gwenhael Goavec-Merou
c6d4a8bff1
device: added verbose_level attribute
2025-06-03 11:24:36 +02:00
Gwenhael Goavec-Merou
5f6c1bfcd4
Merge pull request #543 from trabucayre/spiOverJtag_v2
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SpiOverJtag v2
2025-05-29 08:41:10 +02:00
Gwenhael Goavec-Merou
03045dc407
xilinx: adapted code to support existing spiOverJtag bitstreams (v1) and new bitstreams (v2)
2025-05-26 09:53:10 +02:00
Gwenhael Goavec-Merou
ba48d53409
main: added detect_flash in SPI Mode and with a manufacturer
2025-05-24 07:50:51 +02:00
Gwenhael Goavec-Merou
e135f1820b
ice40: added detect_flash support
2025-05-24 07:48:21 +02:00
Gwenhael Goavec-Merou
10ba59c1ec
libusb_ll,ftdipp_mpsse: Bus and Device must be both == 0 to use filter or uses VID/PID
2025-05-24 07:46:58 +02:00
Gwenhael Goavec-Merou
6c4dbe94cc
Merge pull request #553 from cheyao/master
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Add support for icepi zero
2025-05-23 07:27:18 +02:00
Cyao
7c423c15fd
Add icepi zero to board.hpp
2025-05-23 07:02:44 +02:00
Junhui Liu
5fefbb39af
Add support for MILIANKE-S200-EG4D20 and update document
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Add board definition and FPGA part ID for the MILIANKE S200 EG4D20
development board. Also update related documentation and outdated URL.
Tested ok by loading bitstream to SRAM and FLASH.
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
2025-05-22 11:05:51 +08:00
Junhui Liu
951db00617
anlogicCable: Fix wrong ANLOGICCABLE_VIDv1
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ANLOGICCABLE_VIDv1 should keep the old ANLOGICCABLE_VID to compatible
with the original device.
Fixes: 4b008a0 ("anlogicCable: refresh with new VID")
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
2025-05-22 10:37:04 +08:00
Gwenhael Goavec-Merou
e18c139941
spiFlashdb.hpp: disables quad mode configuration for all N25Q. It's useless because the chip is able by default to support single and quad transaction and after this configuration the flash is unable to works in single mode.
2025-05-21 10:17:10 +02:00
Gwenhael Goavec-Merou
e6ee4fb99a
libusb_ll: probe type -> probe_type
2025-05-15 18:18:49 +02:00
Gwenhael Goavec-Merou
392b4c61ee
libusb_ll/scan: improved display by align column according to max size ( #549 )
2025-05-15 08:09:25 +02:00
Julio Nunes Avelar
c291aade70
Adding support for Open Source SDR Lab Kintex-7 325t FPGA PCIE Development Board
2025-05-12 12:38:30 -03:00
Gwenhael Goavec-Merou
4553bacb05
colognechip: performs reset after SPI Flash write
2025-05-01 16:19:05 +02:00
Dusk
f6afb5ab9f
Add support for Digilent Anvyl, the Big Red Board.
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Programming to SRAM works. Programming flash works with a renamed
spiOverJtag bitfile - cs(g)484 is different from fg(g)484, but the
configuration flash IOs all end up on the same pads in the end.
2025-04-26 23:49:24 -07:00
Gwenhael Goavec-Merou
7a509b56ee
Merge pull request #541 from bl0x/numato-neso-support
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Add support for Numatolab Neso board.
2025-04-24 06:59:25 +02:00
Mike Goelzer
ff1e77debf
adds GCM board type and FT4232H interface B cable
2025-04-23 07:04:40 -06:00
Gwenhael Goavec-Merou
d942c79f62
jtag: added method to retrieves number of devices in the JTAG chain
2025-04-22 18:59:19 +02:00
Bastian Löher
bdeb74b61e
Add support for Numatolab Neso board. Programming SRAM over USB works, when board jumpers are set for JTAG programming mode. SPI flashing does not work properly (does not boot).
2025-04-21 21:17:54 +02:00
Gwenhael Goavec-Merou
198cfbe604
ihexParser: added type 04 (Extented Linear Address Record) and 05 (Start Linear Address Record)
2025-04-21 17:47:02 +02:00
Gwenhael Goavec-Merou
c97369c241
spiFlash: only uses spi_put with distinct cmd parameter
2025-04-21 07:42:26 +02:00
Gwenhael Goavec-Merou
6c0c38d0cc
esp_usb_jtag: added reference to esp32s3-jtag repository
2025-04-20 12:47:28 +02:00
Gwenhael Goavec-Merou
b7967cf71a
esp_usb_jtag: improves
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- esp_usb_jtag: added xfer method to handle/simplify libusb_bulk_transfer calls
- src/esp_usb_jtag.cpp: simplify some operations
- src/esp_usb_jtag.cpp: writeTDI: fixed rx buffer index, added a basic code to handle end transaction
- src/esp_usb_jtag.cpp: writeTMS: store and uses _tdi & _tms
- src/esp_usb_jtag.cpp: toggleClock: re-uses _tdi/_tms
- src/esp_usb_jtag.cpp: writeTDI: ditto
- esp_usb_jtag: fixed verbosity level/be more quiet
- esp_usb_jtag: fixed writeTDI with end and tms transition: now integrated instead of distinct sequence. Fixed TDI value with tms transition. Working with ECP5
- esp_usb_jtag: added optional parameter to lower timeout error (useful when it's time to flush the device)
- esp_usb_jtag: fixed writeTDI when tx is NULL
2025-04-18 07:32:37 +02:00
Emard
fa1d328b93
esp_usb_jtag: new cable
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- copy dirtyjtag to esp_usb_jtag, it compiles
- copy protocol definiton, defines and private data/struct from openocd esp_usb_jtag.c
- ulx3s_esp board with esp32s3 cable
- esp_usb_jtag specify usb vid:pid in jtag.cpp
- hardcode usb interface and endpoints
- getting caps
- set chip id (not applicable for fpga)
- tms write done, untested
- cleanup and toggle clk
- 32bit counting
- setting divisor (todo read base freq)
- div range within 1-255
- base speed from descriptor
- fix doc typo with swapped tms/tdi some cleanup but it doesn't work.
2025-04-18 07:32:15 +02:00
Gwenhael Goavec-Merou
d155bf6a35
Merge pull request #538 from nexthop-ai/nate-a7-15t
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Add support for Artix A7 15t
2025-04-16 06:14:55 +02:00
Junhui Liu
68c7786f5f
Add support for xc7k480t
2025-04-09 21:01:16 +08:00
Nate White
6e05a7fa25
Add support for Artix A7 15t
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Tested on real hardware, connecting through Linux gpiod
2025-04-08 15:31:41 +00:00
Gwenhael Goavec-Merou
ccb11ffe01
Merge pull request #534 from phdussud/master
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Fix incompatibility with Lattice FPGA
2025-03-30 08:56:35 +02:00
Patrick Dussud
6623ceff28
Fix incompatibility with Lattice FPGA
2025-03-29 17:23:02 -07:00
Clemens Horch
fd66d4a74a
Added support for Everspin MRAM (EM008LX, EM016LX, EM032LX and EM064LX)
2025-03-28 09:06:02 +01:00
Gwenhael Goavec-Merou
5ced26c3f6
gowin: Improved eraseSRAM/SPI Flash prepare for Arora V devices
2025-03-26 13:14:39 +01:00
Franck Jullien
1698d6751e
part.hpp: add Xilinx xc7s75
2025-03-25 11:12:05 +01:00
Gwenhael Goavec-Merou
f5ed5c4400
Merge pull request #529 from mer0m/master
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kcu105: add support for secondary QSPI
2025-03-21 19:12:44 +01:00
vbuitvydas
b1f4c35312
Added support for MX25L25645G FLASH memory
2025-03-21 15:50:17 +02:00
Gwenhael Goavec-Merou
671224a544
mcsParser: check if _bit_data size is not larger than bitstream
2025-03-21 06:47:30 +01:00
bma
4e5fd9fabc
Merge branch 'kcu105_dual_qspi'
2025-03-20 20:47:12 +01:00
bma
1c78344ca5
kcu105: add secondary qspi detection and dump
2025-03-20 20:11:02 +01:00
bma
1bb69dcf22
kcu105: add fpga package in description
2025-03-20 20:09:46 +01:00
Gwenhael Goavec-Merou
4c4f48ea93
fix to have an happy CI
2025-03-18 23:02:11 +01:00
Gwenhael Goavec-Merou
414a7259f0
altera: uses --flash-sector to only update a subset of internal flash sectors
2025-03-18 22:42:00 +01:00
Gwenhael Goavec-Merou
719697eabe
common: added function to split a string to a vector by using a delimiter
2025-03-18 22:39:44 +01:00
Gwenhael Goavec-Merou
4a5a912b9d
mcsParser: fixed warnings
2025-03-17 07:25:13 +01:00
Gwenhael Goavec-Merou
2ee72c0556
mcsParser: _bit_length/buffer size / addr sanity check
2025-03-17 07:19:19 +01:00
Gwenhael Goavec-Merou
f86037231a
altera: added max10_mem_t in max10_memory_map for 10M16SA Max10 variant
2025-03-16 08:50:13 +01:00