luke/openFPGALoader
1
0
Fork 0
mirror of https://github.com/trabucayre/openFPGALoader.git synced 2026-09-02 11:08:49 +02:00
Code Issues Packages Projects Releases Wiki Activity

ftdispi, ecpq: use enum for endianness and cs mode

Browse Source
This commit is contained in:
Gwenhael Goavec-Merou
2020-10-06 08:36:12 +02:00
parent 1a952f466a
commit 221e814509
2 changed files with 12 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/epcq.cpp
+4 -4
View File
@@ -45,14 +45,14 @@ void EPCQ::wait_wel()
{
uint8_t cmd = RD_STATUS_REG, recv;
_spi.setCSmode(SPI_CS_MANUAL);
_spi.setCSmode(FtdiSpi::SPI_CS_MANUAL);
_spi.clearCs();
_spi.ft2232_spi_wr_and_rd(1, &cmd, NULL);
do {
_spi.ft2232_spi_wr_and_rd(1, NULL, &recv);
} while(!(recv & STATUS_REG_WEL));
_spi.setCs();
_spi.setCSmode(SPI_CS_AUTO);
_spi.setCSmode(FtdiSpi::SPI_CS_AUTO);
}
/* wait for WIP goes low by reading
@@ -62,14 +62,14 @@ void EPCQ::wait_wip()
{
uint8_t cmd = RD_STATUS_REG, recv;
_spi.setCSmode( SPI_CS_MANUAL);
_spi.setCSmode( FtdiSpi::SPI_CS_MANUAL);
_spi.clearCs();
_spi.ft2232_spi_wr_and_rd(1, &cmd, NULL);
do {
_spi.ft2232_spi_wr_and_rd(1, NULL, &recv);
} while(0x00 != (recv & STATUS_REG_WIP));
_spi.setCs();
_spi.setCSmode( SPI_CS_AUTO);
_spi.setCSmode( FtdiSpi::SPI_CS_AUTO);
}
/* enable write enable */
src/ftdispi.hpp
+8 -5
View File
@@ -7,12 +7,15 @@
class FtdiSpi : public FTDIpp_MPSSE, SPIInterface {
public:
#define SPI_MSB_FIRST 0
#define SPI_LSB_FIRST 1
#define SPI_CS_AUTO 0
#define SPI_CS_MANUAL 1
enum SPI_endianness {
SPI_MSB_FIRST = 0,
SPI_LSB_FIRST = 1
};
enum SPI_CS_mode {
SPI_CS_AUTO = 0,
SPI_CS_MANUAL = 1
};
FtdiSpi(int vid, int pid, unsigned char interface, uint32_t clkHZ,
bool verbose);