ffd3091325
Fix bug 483 again. Faulty merges of KLU changes for cider were
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introduced in ngspice 42. These broke the fix.
2024-10-26 19:08:43 -07:00
781e94b085
Merge branch 'pre-master-44' into bt_dev
2024-10-26 13:46:29 -07:00
aa97a05f04
Use the correct type for each vector after S-parameter analysis.
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Cy_1_1 is still missing (voltage as default).
2024-10-26 17:32:19 +02:00
8f6187b1ab
Fix bug 711 reported by Sonia Edward
2024-10-25 23:41:42 +02:00
330ebb4018
Improve comment
2024-10-21 13:58:22 +02:00
9b8c7bd62f
Fix bug no. 708, reported by Philip Sauvage.
2024-10-20 23:32:16 +02:00
67df0c227b
Minor change.
2024-10-17 17:09:52 +02:00
106d2a93cf
Minor change.
2024-10-17 17:09:36 +02:00
45ed95d91e
Minor change.
2024-10-17 17:09:20 +02:00
759d3f86c1
OpenVAF-reloaded compiled model support.
2024-10-17 17:09:10 +02:00
eb51bc90f7
Add save_files_only option to the gnuplot command.
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The .plt and .data files are saved but gnuplot is not invoked.
For example:
gnuplot name save_files_only plotargs
2024-10-10 15:21:10 -07:00
878ac0076a
Allow plotting a single point in an ascii plot
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(command .asciiplot)
2024-10-09 16:58:20 +02:00
7c9ac42fd1
Fix Bug #698 -
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"Initial transient solution assumes voltage source=0 even if it is not."
Cause was another error in ad5bb9eb8d#607 , which uncovered
an earlier latent bug.
2024-10-08 13:02:29 +02:00
e0079e1cd5
Improve an error message.
2024-10-08 13:02:21 +02:00
e658a0942b
Try to clarify the mechanism of parameter substitution and add
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an example of substituting an XSPICE vector parameter.
2024-10-08 13:02:06 +02:00
2232269217
Added: Error: Pole/zero analysis is not (yet) supported with 'option KLU'.
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Use 'option sparse' instead.
2024-10-05 20:11:58 +02:00
5b3b48b913
This does not fix noise analysis with klu.
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It does add missing { and } when event-driven instances are not present.
Without this change CKTop will always be called again directly in NOISEan even
if CKTop was previously called by EVTop. This matches the intended
behavior before #ifdef KLU was added.
2024-10-05 20:11:46 +02:00
5493862a1d
Some cosmetics
2024-10-05 20:05:54 +02:00
8422c1caa1
Revert the sign of ac_gain.real
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Fix bug no 697, reported by Matthieu Guerquin-Kern
2024-10-05 19:59:43 +02:00
ac4b7efbe3
Insert correct conversion sections for KLU matrices
2024-09-27 10:51:44 +02:00
6ec6e1c723
Add optional series resistance or junction capacitance, if non
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is defined in the .model statement. This may help achieving
convergence if subcircut models of opamps etc use simple diodes
as voltage limiters. Example call:
.options diode_cj0=20p diode_rser=20m
2024-09-23 12:34:17 +02:00
b14420803a
Fix commit 09685dde1
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("Set lower case for variables or vectors in command 'echo'.
Tokens starting with '$' will get lower-casing.", 2024-09-07)
Don't use s as name for temporary string, as s has been set
already and is used later.
2024-09-13 11:35:28 +02:00
09685dde1c
Set lower case for variables or vectors in command 'echo'.
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Tokens starting with '$' will get lower-casing.
2024-09-07 18:50:13 +02:00
02a5f6691e
Fixed KLU conversion to complex for SP Analysis
2024-08-29 00:24:58 +02:00
ecc8990e20
Make error messages more verbose:
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add line number and source file name.
2024-08-28 16:20:10 +02:00
30ee6dff97
Add line number and source file to some error messages
2024-08-28 16:08:36 +02:00
0553960e37
Fix warning message
2024-08-28 16:05:56 +02:00
a3bae9bc7a
More on verbose error and warning messages
2024-08-28 16:05:03 +02:00
d18680d728
Allow KiCad special token V(/xyz) by quoting
2024-08-28 15:14:00 +02:00
ce656bd400
Make error messages more verbose:
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add line number and source file name.
2024-08-28 15:12:56 +02:00
4a9a734bf3
Fix bug #680 . Check that src/dest memcpy arguments are non-NULL.
2024-08-23 19:52:30 +02:00
4b0beff839
extend bsim4 operating point info list
2024-08-23 09:14:31 +02:00
4a8000cad9
Add simulator version info to raw file ('write' commad)
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using an extra line 'Command: ...').
The old sequence (adding commands manually to raw file) is
still available.
The 'Command: anycommand' will not be executed if loading
an ngspice-generated raw file. Raw files from other simulators may
generate a warning that the command is not available.
2024-08-18 14:21:03 +02:00
413382bd56
Add simulator version info to raw file in batch mode,
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using the line 'Command:...'
2024-08-18 14:16:42 +02:00
b03dd90694
Fix #686 : "XSpice Verilog Vector Input Bug".
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Bug report and fix by Aodhan Murray.
2024-08-16 12:25:30 +02:00
816f43dd36
Improve debugging using shared ngspice:
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print out each command received.
2024-08-16 12:21:12 +02:00
6ea6f8d9a8
Add a comment
2024-08-03 16:08:41 +02:00
ee9a8462ea
add missing klu bindings
2024-08-02 16:32:47 +02:00
3af65f1d28
Notes go to stdout.
2024-08-01 13:39:18 +02:00
7bfaefada4
Don't dereference a NULL pointer.
2024-08-01 13:36:44 +02:00
f95e8c2e3a
Error and warning messages to stderr
2024-08-01 13:28:32 +02:00
2e8bd0cea6
Note directed to stdout
2024-08-01 13:28:08 +02:00
c2795a350a
enable compiling with CYGWIN
2024-07-26 12:08:51 +02:00
038c18429f
Fix gcc warnings.
2024-07-25 21:33:44 +02:00
beb07ea6df
Add a utility function to the d_cosim code model to open dynamic
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libraries. It automatically tries adding standard file extensions,
so that model lines for d_cosim can be the same for all OSs.
2024-07-25 21:33:16 +02:00
cdbe31868f
Add support for including Verilog simulation within an instance
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of the d_cosim codemodel, using libvvp, the simulation runtime of
Icarus Verilog. This complements the existing method using Verilator.
The new source code is built into two binary shared libraries,
ivlng.so (or .DLL) and ivlng.vpi that are loaded during simulation.
2024-07-25 21:32:59 +02:00
e201f144d5
Add support for Verilator's --timing option, allowing use of delays
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in Verilog source code. Also add two parameters to d_cosim:
sim_args is used to pass string arguments to a Verilator simulation;
and lib_args is for future use. In vlnggen, also check for two causes
of failure: a verilator error may lead to creation of interfering header
files; and misleading instances of verilated_shim.cpp can cause an obscure
failure (reported by Diarmuid Collins).
Use a generic name for the generated DLL in MSVC.CMD.
2024-07-25 21:32:42 +02:00
4481531baf
Allow trailing null connections to be omitted from XSPICE device
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lines. Also tidy some code,
2024-07-25 21:32:21 +02:00
ab1f16517e
Changes to d_cosim to work with initial support for Icarus Verilog.
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Fully resolve symbols on loading and tolerate attempts to set
output in the past.
2024-07-25 21:31:46 +02:00
aa9a0a637e
vbic: have to load Vrxf/Itxf with value
2024-07-23 14:34:32 +02:00
Brian Taylor
Holger Vogt
Árpád Bűrmen
Giles Atkinson
Alessio Cacciatori
Francesco Lannutti
dwarning
Vogt