Holger Vogt
33e17fa969
noise simulation examples
2023-04-02 22:56:49 +02:00
Giles Atkinson
7f4eb1c7d8
Add examples of controlling auto-bridge behaviour
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with the "vcc" and "family" parameters.
2023-04-01 13:56:23 +02:00
Holger Vogt
6213145c94
.control section: atanh examples
2023-03-18 22:32:34 +01:00
Holger Vogt
c2fb32f98a
really run a dc simulation
2023-03-18 14:30:23 +01:00
Holger Vogt
d36c4b8772
Remove bulk simulation netlist from files
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needing a .control section.
2023-01-28 17:02:13 +01:00
Holger Vogt
8c98b70e45
Add input file dedicated to batch mode,
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to be run with
ngspice -b -r inv.out bsimbulk_inverter_bach.sp
2023-01-28 17:01:53 +01:00
Holger Vogt
512bcf6095
Remove unused folder
2023-01-28 17:01:37 +01:00
Holger Vogt
dbdbcf95c2
BSIMBULK example with locally adding osdi models
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by using the 'pre_osdi' command in a .control section
2023-01-28 17:01:22 +01:00
Holger Vogt
b9eef23eed
Update the example structure for OSDI/OpenVAF:
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all compiled models into lib/ngspice
spinit updated to load the models via command 'osdi'
local calls with 'pre_osdi' commanted out.
2023-01-27 16:08:17 +01:00
Holger Vogt
5bd45eeb87
The Roessler Attractor examples has been provided by
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Giles Atkinson, of course
2023-01-24 16:29:50 +01:00
Holger Vogt
16c7c407d4
Nice looking Roessler Attractor
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provided by A. Gillespie
2023-01-24 15:17:45 +01:00
Holger Vogt
cb5f9e9bdc
MOS example files updated and moved to its own directory
2023-01-24 15:17:31 +01:00
Holger Vogt
af9f25e985
Various filter examples using Laplace expression x_fer
2023-01-20 15:07:37 +01:00
Giles Atkinson
bf580abf69
Add a simple example of using string-valued parameters.
2023-01-09 16:33:53 +01:00
Holger Vogt
01c211339c
Rename example file
2023-01-09 16:33:38 +01:00
Brian Taylor
4936fa2b1d
Add serial load to 74f524 example.
2023-01-09 16:33:10 +01:00
dwarning
0cae4f0b6c
special ngbehavior needed
2023-01-09 16:31:01 +01:00
Brian Taylor
c7fd3bcaee
Add example for 74f524.
2023-01-09 16:30:42 +01:00
Holger Vogt
4bcd4daf55
Rename projetc to OR (OR-gate)
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Add new path (absolute, so has to be modified by any user)
2022-12-27 14:22:07 +01:00
Holger Vogt
b639ebae44
Rename examples for ECL OR gate
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Simulate OR gate faster TSTEP 0.1n -> 0.3n
2022-12-27 14:21:24 +01:00
Holger Vogt
3e27e640b5
Missing renaming: osdi_win --> osdi_libs
2022-12-27 14:19:58 +01:00
Holger Vogt
4f73f18f6d
Remove
2022-12-27 14:19:18 +01:00
Holger Vogt
69660ad387
Move adder_common.inc to be available for all test files.
2022-12-27 14:18:54 +01:00
Holger Vogt
bb9469a03a
Rename test_osdi_libs to osdi_libs
2022-12-27 14:14:01 +01:00
Holger Vogt
96608abbe2
Update with Semimod download page
2022-12-27 14:13:27 +01:00
Holger Vogt
157200aa86
Rename test_osdi_win to test_osdi_libs
2022-12-27 14:13:02 +01:00
Holger Vogt
a211a90e5a
Mextram models: plotting with thicker lines
2022-12-27 14:12:41 +01:00
Holger Vogt
ac73e6f7b7
Update to the examples for osdi
2022-12-27 14:12:10 +01:00
Holger Vogt
d7bdfe1a20
Re-add optional selection of Berkeley model parameters.
2022-12-19 12:43:55 +01:00
h_vogt
5ec6543dbb
Add log plots
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Add sim vs. Temp.
Add y-labels
2022-12-19 12:43:27 +01:00
Holger Vogt
e28d3feee0
Remove unused variable debarr.
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Add another example.
2022-12-11 15:39:10 +01:00
Holger Vogt
45574cecb2
derivative inside of .func
2022-12-11 15:38:49 +01:00
Holger Vogt
89a48e7d73
simple example for derivative in B source
2022-12-11 15:38:37 +01:00
Holger Vogt
082ae1603e
add linewidth for graphs
2022-12-11 15:36:57 +01:00
Holger Vogt
058e7a34f8
tiny update, typos, font size
2022-12-11 15:36:42 +01:00
Brian Taylor
7ff8f3773f
Handle cases where logicexp has a timing model but no pindly. This is rare, only 22 tests from the digital libraries. Move digital examples, add missing .spiceint file.
2022-12-11 15:34:33 +01:00
Brian Taylor
cd883d23d6
Examples for 74*568 behavioral subckts.
2022-12-11 15:33:53 +01:00
Holger Vogt
5324319edb
Move digital examples to new locations
2022-12-11 15:33:08 +01:00
Holger Vogt
925dc55a73
rename example file
2022-12-11 15:28:23 +01:00
Holger Vogt
ca1974ff37
Examples moved to folder /various
2022-12-11 15:28:01 +01:00
Holger Vogt
751019b447
Examples for d_pwm and d_osc
2022-12-11 15:27:42 +01:00
Brian Taylor
4294f49968
Add more vectors to behavioral 283 circuit. Add tristate buffer circuit which shows glitches until inertial delays are implemented.
2022-12-11 15:25:24 +01:00
Brian Taylor
d425beb557
Typo, 2 x1 subcircuits.
2022-12-11 15:20:49 +01:00
Brian Taylor
d54c1fc091
Add pindly tristate example. Cleanup error handling.
2022-12-11 15:20:27 +01:00
Brian Taylor
b142be7fde
Add behavioral (LOGICEXP, PINDLY) test for 283 circuit. There are glitches in the simulation for some of the s* outputs. Probably due to not having inertial delays. And why not set 'zero' delays as close to zero as permitted by XSPICE.
2022-12-11 15:19:39 +01:00
Brian Taylor
4e76586b6b
Reduce the delays of 'zero' delay gates to 1.0e-11. Add decoder test for logicexpr and pindly.
2022-12-11 15:19:17 +01:00
Holger Vogt
43de22ec24
Update to the examples: enable plotting with option digitop
2022-10-24 17:05:34 +02:00
Holger Vogt
0aff89dc28
Example for URC distributed RC transmission line
2022-10-22 16:00:15 +02:00
Holger Vogt
ec6a902fb9
Fix a bug in simple diode, when ilimit is set, but not epsilon.
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Make model more similar to LTSPICE
Add an example
2022-10-08 16:50:38 +02:00
Giles Atkinson
b212a49982
Add some automatic bridge examples, mostly using the bidirectional bridge.
2022-10-08 16:48:36 +02:00
Holger Vogt
cb42895dad
example for pwlts source code model
2022-10-07 13:39:33 +02:00
Holger Vogt
d39c60542d
Enable power measurement for W switch
2022-10-07 13:18:51 +02:00
Holger Vogt
fe8eb26aaf
Replace end-of-line comment delimiter $ by ;
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So to make it independent from compatibility switch selection.
2022-10-07 13:18:29 +02:00
Holger Vogt
f1eb8d3955
examples for .probe alli or .probe i(xx)
2022-10-07 13:17:55 +02:00
Holger Vogt
3dbfc934bb
set colors for grids and data
2022-10-07 13:17:06 +02:00
Brian Taylor
4706c3dea5
Add 74xx283 4-bit adder example from the Micro Cap digital example circuits. Pspice primitives are translated to Xspice and a waveform is displayed using GTKWave. This is a digital-only test.
2022-10-07 13:15:23 +02:00
Holger Vogt
e9b5a9a957
aswitch needs two input nodes because gd has been selected for input.
2022-10-07 13:13:38 +02:00
Holger Vogt
c8ed9590b7
Handle the case when control voltages on and off are equal.
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Update the linear switch: add the limits to resistance ron, roff
Update the log switch: correct the resistance calculation for
von < voff
Add some examples for the pswitch.
2022-10-07 13:12:56 +02:00
Holger Vogt
5b0b328186
If a node name to be plotted ends by ':power', its type is set to POWER.
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Thus 'settype power nodename(s)' in the examples is no longer necessary.
2022-10-07 13:12:04 +02:00
Holger Vogt
2deefe1fbc
New tables for MOS devices
2022-10-07 13:11:18 +02:00
Holger Vogt
765d2e8a0e
Return data to input directory.
2022-10-07 13:10:51 +02:00
Holger Vogt
a69dd1bcde
Simplify the NMOS or PMOS selection by setting only one parameter
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'mostype'
ngspice-37+ is required.
2022-10-07 13:10:06 +02:00
Brian Taylor
7f38ce4ebb
Remove debug code.
2022-10-07 12:55:42 +02:00
Brian Taylor
112e47d0d3
This test is equivalent to examples/xspice/xspice_c3.cir and uses Pspice subckts for the divider and nand gate.
2022-10-07 12:53:03 +02:00
Brian Taylor
e8dfd16cb2
Add counter test. Check for usage of $d_lo, $d_hi, $d_nc usage with dff, jkff, dltch which will not translate to Xspice.
2022-10-07 12:52:39 +02:00
Brian Taylor
f7c519f149
All-digital U* device examples. No a/d or d/a interfaces on the subcircuits.
2022-10-07 12:52:20 +02:00
Holger Vogt
c4efe2e3ac
Update, link on device models (public domain or TI)
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Download adresses for TI models.
2022-05-15 18:36:35 +02:00
Giles Atkinson
2e329986b8
Fix filename case.
2022-05-10 15:29:51 +02:00
Holger Vogt
ac8f8ad65d
New example: S-parameters of a Tschebyschef Low Pass filter
2022-05-09 10:07:48 +02:00
Holger Vogt
07feb637b5
New example for power measurement with .probe
2022-05-09 10:07:41 +02:00
Holger Vogt
129893b399
S-parameters: Replace S11 by S_1_1 etc. to avoid ambiguity
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when more than 10 ports are measured.
Update to S-parameter script and command wr2sp
2022-04-29 07:29:14 +02:00
Holger Vogt
aca85ec386
Add .probe p(...) commands (including plotting and averaging)
2022-04-26 10:37:10 +02:00
Holger Vogt
cd451bd5b3
Add measuring power of the VDMOS devices with .probe p(device)
2022-04-26 10:36:39 +02:00
Holger Vogt
a0ee275b08
Improve printout formatting
2022-04-26 10:33:01 +02:00
Holger Vogt
6b03aaa15f
examples for loops.
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The syntax is listed in the ngspice manual,
chapter 17.6 Control Structures. Practical examples
using a simple voltage divider circuit are given here.
2022-04-26 10:32:53 +02:00
Holger Vogt
9882c3a24c
New examples: command 'sp' and three-port example
2022-04-25 21:31:58 +02:00
Holger Vogt
5fb19c41bc
Fix internet address
2022-04-25 21:30:07 +02:00
Holger Vogt
a3d55cdddb
Replace (all) by alli
2022-04-25 21:29:55 +02:00
Holger Vogt
82822eb260
replace (all) by alli
2022-04-25 21:29:47 +02:00
Holger Vogt
18a01244af
save only relevant digital data (command 'esave'
2022-04-25 21:27:11 +02:00
Holger Vogt
7f326b4fe1
remove options not needed
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local behavior setting
2022-04-25 21:26:57 +02:00
Holger Vogt
48e0164cc4
Replace $ in instance and.model lines by ;
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$ is not a valid end-of-line comment delimiter when PS
compatibility mode is chosen.
2022-04-25 21:26:42 +02:00
Holger Vogt
c8beb1e601
Replace $ by ; as a universally valid end-of-line-comment delimiter
2022-04-25 21:26:35 +02:00
Holger Vogt
63a4e44c2c
Add more parameters to the example
2022-04-25 21:26:23 +02:00
Holger Vogt
f2ba4a93fb
Update example for independent grid and line widths
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in polar or Smith plots.
2022-02-17 15:50:27 +01:00
Holger Vogt
36da24e251
Add another RF example, drawn from fig. 13.2 of
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https://qucs-help.readthedocs.io/en/spice4qucs/RF.html
2022-02-17 15:50:05 +01:00
Alessio Cacciatori
2c10c4aebd
S parameter simulation
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Command '.sp'
arbitrary number of ports
ports made with modified VSRC
Patch provided by Alessio Cacciatori
https://sourceforge.net/p/ngspice/discussion/127605/thread/7a2655c86f/
2022-02-17 15:48:00 +01:00
Holger Vogt
afde37c35d
add y-axis label
2022-02-01 12:21:08 +01:00
Holger Vogt
a464ef47bc
meas example with output redirection
2022-01-15 16:03:19 +01:00
Holger Vogt
2981d0f56d
Use 'esave none' to reduce memory consumption.
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Only analg nodes are to be saved.
2022-01-09 10:58:51 +01:00
Holger Vogt
738ac4863c
Obtain memory and simulation time
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Add rusage information command
2022-01-03 22:11:15 +01:00
Carsten Schoenert
e373ca0e2f
tcl-testbench[x].sh: Use bash within shebang
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These scripts using non Posix shell extensions which are provided by bash and
require the bash as shell to be fully functional.
2022-01-02 13:51:44 +01:00
Holger Vogt
8bf28b5aee
Comment out non-ngspice compatible commands
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Otherwise error messages would have beeen generated
2021-12-16 08:12:29 +01:00
Holger Vogt
45ceeee509
small updates to example files
2021-12-13 21:50:10 +01:00
Holger Vogt
b714f0bea9
Add other integration methods to the example
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We have: meas, integ, and code model INTEG
2021-12-13 21:50:00 +01:00
Holger Vogt
1605d293d0
Add function integ to control language
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Trapezoidal rule for integrating a vector.
2021-12-13 21:49:45 +01:00
Holger Vogt
a68cfefb28
hcopywidth and hcopyheight failed with SVG plot
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cp_getvar read CP_NUM, not CP_STRING
Patch #108 contributed by Giles Atkinson
Add hcopywidth and hcopyheight to example nmos_out_BSIM330_svg.sp
2021-12-13 21:49:01 +01:00
Holger Vogt
aaf586ae83
.probe: Add more safeguards to prevent crashes
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in case of wrong user input
due to obtain empty lines in shared ngspice
2021-12-13 21:48:21 +01:00
Holger Vogt
d41379177f
.probe: various example netlists
2021-12-13 21:48:09 +01:00
Brian Taylor
f66573883f
Fix typo in the diode/README file.
2021-12-13 21:43:09 +01:00