2024-06-10 12:40:37 +02:00
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The circuits in this directory illustrate the use of the d_cosim
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XSPICE code model as a container for a Verilog simulation using
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Icarus Verilog. Icarus Verilog must be built with the --enable-libvvp option,
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so that its simulation engine is available as a dynamic library.
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The Verilog source code and included parts of the circuit definitions
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can be found in the adjacent "verilator" directory.
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2025-01-19 12:42:45 +01:00
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The circuits and steps below are intended to be used from the directory
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containing this file, certainly ouput files from iverilog should be in
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the current directory when simulating.
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2024-06-10 12:40:37 +02:00
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The example circuits are:
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555.cir: The probably familiar NE555 oscillator provides a minimal example
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of combined simulation with SPICE and Verilog.
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The digital part of the IC, a simple SR flip-flop, is expressed in Verilog.
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delay.v: A very simple example of using delays in Verilog to generate
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waveform outputs.
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pwm.c: Verilog delays controlling a pulse-width modulated output generate
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an approximate sine wave.
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adc.cir: Slightly more complex Verilog describes the controlling part
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of a switched-capacitor ADC.
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Before a simulation can be run, the associated Verilog code must be compiled:
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iverilog -o 555 ../verilator/555.v
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Similar compilations are needed to prepare the other examples.
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The simulations require additional dynamic libraries, ivlng.so (or ivlng.DLL)
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and ivlng.vpi: they are expected to be in the usual installation location.
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To use the versions in a built source tree that has not been installed,
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the .model definitions in the circuit files must be changed to the ugly:
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.model vlog_ff d_cosim sim_args=["555"]
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+ simulation = "../../../release/src/xspice/verilog/.libs/ivlng"
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+ lib_args = [ "libvvp"
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+ "../../../release/src/xspice/verilog/.libs/ivlngvpi.so" ]
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Or for Windows builds using MSVC:
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.model vlog_ff d_cosim sim_args=["555"]
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+ simulation = "..\..\..\visualc\xspice\verilog\ivlng.DLL"
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+ lib_args = [ "libvvp"
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+ "..\..\..\visualc\xspice\verilog\shim.vpi" ]
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