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1158 Commits

Author SHA1 Message Date
gatecat 774d3944b3 parallel_refine: Fix compile error with some configs 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-03-19 18:43:31 +00:00
YRabbit e3b9c971f9 BUGFIX: disable the thousands separator 
The wire numbers are very large and it is undesirable to use a thousand
separator there. This is a side effect of enabling locale.

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2022-03-16 15:05:27 +10:00
YRabbit 53ddbbaa85 Set the locale as early as possible 
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2022-03-16 05:39:55 +10:00
gatecat df7e26c1aa clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-03-09 17:12:59 +00:00
Catherine 626eccdb89 Add missing part of commit aee35768. 2022-03-08 17:24:29 +00:00
Catherine aee35768f4 Disable parallel refinement on WebAssembly. 2022-03-05 16:32:44 +00:00
gatecat cc9f99a80c parallel_refine: New, parallelised placement refinement pass 2022-03-03 18:37:53 +00:00
gatecat 86699b42f6 Switch to potentially-sparse net users array 
This uses a new data structure for net.users that allows gaps, so
removing a port from a net is no longer an O(n) operation on the number
of users the net has.

Signed-off-by: gatecat <gatecat@ds0.me>
 2022-02-27 13:47:05 +00:00
gatecat 434a9737bb Add indexed_store container type 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-02-26 15:11:33 +00:00
gatecat 75c45dbef1 Add IdStringList::concat overrides taking IdString 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-02-20 18:26:17 +00:00
gatecat 6a32aca4ac refactor: New member functions to replace design_utils 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-02-18 11:13:18 +00:00
gatecat 30fd86ce69 refactor: New NetInfo and CellInfo constructors 2022-02-16 15:10:57 +00:00
gatecat 84399caebe run clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-02-03 15:28:46 +00:00
YRabbit 22e4081c73 gowin: Add GUI. 
* Items such as LUT, DFF, MUX, ALU, IOB are displayed;
* Local wires, 1-2-4-8 wires are displayed;
* The clock spines, taps and branches are displayed with some caveats.

For now, you can not create a project in the GUI because of possible
conflict with another PR (about GW1NR-9C support), but you can specify
the board in the command line and load .JSON and .CST in the GUI.

Although ALUs are displayed, but the CIN and COUT wires are not. This is
still an unsolved problem.

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2022-01-29 14:45:17 +10:00
Maciej Kurc ae7c2261be Switched integer pair hashing function from DJB2 to Cantor 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2022-01-11 15:28:13 +01:00
gatecat 69a4e3e544 SSOArray: Implement move and assignment operators 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-12-30 21:32:24 +00:00
gatecat 59874188a6 generic: Refactor for faster performance 
This won't affect Python-built arches significantly; but will be useful
for the future 'viaduct' functionality where generic routing graphs can
be built on the C++ side; too.

Signed-off-by: gatecat <gatecat@ds0.me>
 2021-12-30 11:54:08 +00:00
gatecat ddb084e9a8 archapi: Use arbitrary rather than actual placement in predictDelay 
This makes predictDelay be based on an arbitrary belpin pair rather
than a arc of a net based on cell placement. This way 'what-if'
decisions can be evaluated without actually changing placement;
potentially useful for parallel placement.

A new helper predictArcDelay behaves like the old predictDelay to
minimise the impact on existing passes; only arches need be updated.

Signed-off-by: gatecat <gatecat@ds0.me>
 2021-12-19 17:15:15 +00:00
gatecat f670de7b52 router1: Experimental timing-driven ripup support 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-12-18 20:58:44 +00:00
gatecat 53ce8f3736 router1: Improve timing heuristic 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-12-18 14:30:48 +00:00
gatecat a120ae1fa7 python: Bind getBelLocation/getPipLocation 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-12-14 18:47:35 +00:00
gatecat 0dafcc44ff router2: Improve reservation debug logging 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-12-12 18:49:14 +00:00
gatecat c76e1be397
Merge pull request #867 from mkj/mkj/routerspeed2 
Improvements to ecp5 router speed
 2021-12-12 15:37:36 +00:00
Matt Johnston fc5b34254f ecp5: Keep "visited" local 
Otherwise it keeps growing boundless and slows down small arcs
 2021-12-12 22:09:11 +08:00
gatecat 3c8af04ca5 router2: Error instead of hang in case of reservation conflicts 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-12-12 13:00:04 +00:00
dx-mon b3edf81f6c
common: Improved the random seed initialisation for the context 2021-11-19 09:39:10 -05:00
gatecat 8ad74edd66 router2: Disable criticality sorting towards end of routing 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-10-09 20:56:45 +01:00
gatecat b749ef5f56 hashlib: Support for std::array keys 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-10-07 17:05:16 +01:00
gatecat 211b6b6b06 Fix Cygwin build 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-10-01 12:40:56 +01:00
Maciej Kurc 1db3a87c62 Code formatting 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2021-09-29 14:59:09 +02:00
Maciej Kurc 76f5874ffc Brought back printout of critical path source file references, added clk-to-q, source and setup segment types 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2021-09-29 10:16:45 +02:00
Maciej Kurc 1ed692aca9 Shifted moving of data containers after printing 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2021-09-28 18:01:30 +02:00
Maciej Kurc 9018782eaa Added a commandline option controlled writeout of per-net timing details 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2021-09-28 17:42:51 +02:00
Maciej Kurc a9df3b425f Added description of the JSON report structure. 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2021-09-28 17:42:51 +02:00
Maciej Kurc 6deff56e83 Moved timing result report storage to the context, added its writeout to the current utilization and fmax report 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2021-09-28 17:42:51 +02:00
Maciej Kurc c6dc1f535a Added reporting critical paths in JSON format 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2021-09-28 17:42:51 +02:00
Maciej Kurc d8571b6c00 Decoupled critical path report generation from its printing 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2021-09-28 17:42:51 +02:00
Maciej Kurc 12adbb81b1 Switched to JSON format for timing analysis report 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2021-09-28 17:42:51 +02:00
Maciej Kurc 99ae5ef38e Added writing a CSV report with timing analysis of each net branch 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2021-09-28 17:42:51 +02:00
gatecat 0b0baf3446 idstring: Add 'in' function 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-09-27 19:18:40 +01:00
gatecat 535b2490c4
Merge pull request #812 from antmicro/MacroCells 
Convert macros to clusters for better placement
 2021-09-27 17:50:55 +01:00
Maciej Dudek ea489f6d93 Fix small isses and code formatting 
Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
 2021-09-27 16:16:33 +02:00
gatecat ab6990f908 router2: Allow overriding resource costs 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-09-24 19:11:37 +01:00
Maciej Dudek 3cd459912a Adding MacroCell placement 
Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
 2021-09-23 15:43:23 +02:00
Maciej Dudek fdcfe8cd81 Adding support for MacroCells 2021-09-23 15:43:23 +02:00
gatecat d9a71083e1
Merge pull request #825 from antmicro/chain_swap_fix 
Fix chain swap
 2021-09-23 14:10:46 +01:00
Maciej Dudek 8c97cbe341 Fix chain swap 
Issue was due to dest_bels being not cleared between clusters unbindes, causing
newly bind bels to be unbinded and having their old bel value changed to new bel value.
Then when swap failed 2 cells were being bind to a single bel.

I tested leaving dest_bels in the function scope and moving it to the loop scope.
Code with dest_bels in the loop scope was faster than leaving it in the function scope,
and checking if the cell is in the processed cluster.

Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
 2021-09-23 13:58:22 +02:00
gatecat 562d02196c python: Restore SIGINT handler while running a Python script 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-09-22 22:01:58 +01:00
gatecat 4d90850676 placer1: Remove redundant relative constraint check 
Macros with potentially inconsistent spacing are now permissible.

Signed-off-by: gatecat <gatecat@ds0.me>
 2021-09-22 13:14:45 +01:00
gatecat e926cddca2 placer1: Fix cluster swap cost updates 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-09-18 11:11:24 +01:00