nextpnr

Commit Graph

Author	SHA1	Message	Date
gatecat	a29a17f8f2	clangformat Signed-off-by: gatecat <gatecat@ds0.me>	2024-06-18 13:54:12 +02:00
gatecat	61cc5259d9	prefine: Add shared lock around bel availability checks Signed-off-by: gatecat <gatecat@ds0.me>	2024-06-12 16:11:18 +02:00
Andrew Bell	693058abb7	Eliminate gcc13 warnings.	2024-03-22 09:50:11 +00:00
Catherine	ebbaf8c08d	common: disable parallel refinement only without threads. Previously it was always disabled on WebAssembly builds.	2023-02-23 09:45:19 +01:00
gatecat	09e388f453	netlist: Add PseudoCell API When implementing concepts such as partition pins or deliberately split nets, there's a need for something that looks like a cell (starts/ends routing with pins on nets, has timing data) but isn't mapped to a fixed bel in the architecture, but instead can have pin mappings defined at runtime. The PseudoCell allows this by providing an alternate, virtual-function based API for such cells. When a cell has `pseudo_cell` used, instead of calling functions such as getBelPinWire, getBelLocation or getCellDelay in the Arch API; such data is provided by the cell itself, fully flexible at runtime regardless of arch, via methods on the PseudoCell implementation.	2022-07-08 14:30:57 +02:00
gatecat	19cade3b3b	prefine: Do full-tile swaps, too Signed-off-by: gatecat <gatecat@ds0.me>	2022-04-19 18:37:16 +01:00
gatecat	61b3e2e1ff	Move general parallel detail place code out of parallel_refine Signed-off-by: gatecat <gatecat@ds0.me>	2022-04-17 20:10:49 +01:00
gatecat	49f178ed94	Split up common into kernel,place,route Signed-off-by: gatecat <gatecat@ds0.me>	2022-04-08 13:42:54 +01:00

8 Commits