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nextpnr
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1,642 Commits 30 Branches 10 Tags 20 MiB
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79 Commits

Author SHA1 Message Date
Eddie Hung 83117bef66 Add missing APIs needed for router_improve 2018-11-11 10:19:17 -08:00
Eddie Hung 99f5836b0e Add some cell delays 2018-11-10 19:55:22 -08:00
Eddie Hung a0c6c64be7 blinky.v to not instantiate PS7, blink more slowly/predictably 2018-11-10 18:50:43 -08:00
Eddie Hung 533c730418 Update without $iob suffix 2018-11-10 18:49:58 -08:00
Eddie Hung 10d6db6d94 Do not add "$iob" suffix 2018-11-10 18:48:46 -08:00
Eddie Hung f6bdd92640 Implement Arch::getPipName() and remove debug/verbose before routing 2018-11-10 16:11:38 -08:00
Eddie Hung 3b86c3a381 blinky to instantiate PS7 so that reconfiguring from Linux doesn't kill PS 2018-11-10 12:52:52 -08:00
Eddie Hung 3576509684 Add support for PS7 blocks 2018-11-10 12:51:56 -08:00
Eddie Hung c6f66b4468 Adapt blinky for xc7 2018-11-09 17:05:55 -08:00
Eddie Hung a5be1bbe6e [xc7] Fix LUT mask logic; also add attributes for IGNORE0 and {CE,S,IGNORE}1 2018-11-05 08:21:32 -08:00
Eddie Hung e53f8364ec [xc7] Also ignore PIN token lines for PCF 2018-11-05 08:21:14 -08:00
Eddie Hung f67cf32d0d [xc7] PCF reader to ignore lines with NET token 2018-11-04 22:14:10 -08:00
Eddie Hung 61939dca11 [xc7] blinky.sh to set freq 125 MHz and run trce 2018-11-04 22:13:51 -08:00
Eddie Hung f1b454b96c [xc7] blinky.v to use led0-3, and just to be safe, set BUFGCTRL control 
inputs too
 2018-11-04 22:13:24 -08:00
Eddie Hung 42a1b1a750 [xc7] Add NET PERIOD constraint to blinky.pcf (for trce) 2018-11-04 22:12:43 -08:00
Eddie Hung e137a9c507 [xc7] Add xdl and bitgen to blinky.sh 2018-11-03 16:12:11 -07:00
Eddie Hung 5c56fab0ab [xc7] Add torc_info->site_index_to_bel lookup; also fix Arch::getBelByName() 2018-11-03 15:56:06 -07:00
Eddie Hung aa7f7d6a97 clangformat 2018-11-03 15:18:26 -07:00
Eddie Hung d80b63cc55 [xc7] Re-enable PCF reading 2018-11-03 15:17:53 -07:00
Eddie Hung 4239e3668a [xc7] Make clg400 the default package (Zybo) 2018-11-03 15:02:09 -07:00
Eddie Hung c6bf8aff43 [xc7] Fix timing analysis for constant drivers 2018-11-03 14:24:29 -07:00
Eddie Hung 8f1c91151b Revert "[xc7] Fix getPortTimingClass for IOBs" 
This reverts commit 5d9019994e.
 2018-11-03 13:30:58 -07:00
Eddie Hung 0e1c23a07b [xc7] blinky.v to only have 4 LEDs 2018-11-03 13:27:39 -07:00
Eddie Hung 5d9019994e [xc7] Fix getPortTimingClass for IOBs 2018-11-03 12:55:36 -07:00
Eddie Hung 324ff41f13 Fix Torc path 2018-11-03 12:10:21 -07:00
Eddie Hung 735c7c7c9c torc now expected to be /opt/torc 2018-11-03 11:41:36 -07:00
Eddie Hung 834f5f58c2 Fix wire delays, disable BUFG I->O routethrough 2018-09-05 22:24:46 -07:00
Eddie Hung 5214d1dbb5 Segment anchors may not be beginning of wires 2018-09-04 11:05:03 -07:00
Eddie Hung d0916943c5 Extend delays to cover BYP and FAN 2018-09-04 10:41:32 -07:00
Eddie Hung c7f0bdfc1b Move DelayInfo into loop 2018-09-04 10:35:12 -07:00
Eddie Hung db6e81d6c3 Populate Arch::getWireDelay() 2018-09-04 10:11:10 -07:00
Eddie Hung 7da5e2b525 Reduce predictDelay/estimateDelay to 100ps per tile 2018-09-04 10:10:27 -07:00
Eddie Hung d78f5a1d5b Build a pip_to_dst_wire lookup to speedup routing 2018-09-03 22:59:34 -07:00
Eddie Hung 30fe1f229a Set CE0INV and S0INV for BUFGCTRL; PRESELECT_I0 to be TRUE if not set 2018-09-03 22:25:05 -07:00
Eddie Hung 2eeb59d9f1 Re-enable routing 2018-09-03 22:24:59 -07:00
Eddie Hung 3a5665c1cb Speedup placement slightly using bel_to_loc 2018-09-03 21:00:11 -07:00
Eddie Hung 4f61d2dae7 Add yosys script 2018-09-03 19:23:36 -07:00
Eddie Hung 86fa032b63 picorv32_top to instantiate BUFGCTRL, and picorv32.sh to use picorv32.ys script 2018-09-03 19:23:00 -07:00
Eddie Hung 7f1c1ecaf0 blinky.v to instantiate BUFGCTRL correctly 2018-09-03 19:22:39 -07:00
Eddie Hung bf5a4717f5 Add pips to XDL output 2018-09-03 13:40:52 -07:00
Eddie Hung 6d17810dde Merge fixes 2018-09-03 13:20:19 -07:00
Eddie Hung c128df127b Do not consider route-through for CLB tiles 2018-09-03 13:17:16 -07:00
Eddie Hung d2597bcd8d Fix segments 2018-09-03 00:10:16 -07:00
Eddie Hung 3f865f9049 Fix Arch::estimateDelay() 2018-09-02 23:38:53 -07:00
Eddie Hung 7e693ff27d Precompute pips too 2018-09-02 19:06:20 -07:00
Eddie Hung ca7eef26ac Wires now encapsulate segments 2018-09-02 16:57:11 -07:00
Eddie Hung df2f295545 Apparently netgen needs SYNC_ATTR to be set 2018-09-02 13:09:28 -07:00
Eddie Hung 82fbc551f8 Fix DRC errors 2018-08-21 22:58:20 -07:00
Eddie Hung 3a177c72c6 Preserve packed LUT name as LUT_NAME parameter 2018-08-21 22:24:14 -07:00
Eddie Hung b658a39d73 IOB -> IOB33; preserve FF init as DFF_INIT, use BUFGCTRL with PRESELECT_I0 in blinky 2018-08-21 22:18:00 -07:00