Commit Graph

6 Commits

Author SHA1 Message Date
Keith Rothman 8675945b26 Fix bug where DedicateInterconnect incorrectly allows some placement.
This occurs when the driver pin and sink pin are part of the same site,
but not reachable with site routing only.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-03-30 13:24:39 -07:00
Keith Rothman c8dccd3e7b Implement debugging tools for site router.
- Finishes implementation of SiteArch::nameOfPip and SiteArch::nameOfWire
 - Adds "explain_bel_status", which should be an exhaustive diagnostic
   of the status of a BEL placement.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-03-25 17:56:11 -07:00
gatecat 23413a4d12 Fix compiler warnings introduced by -Wextra
Signed-off-by: gatecat <gatecat@ds0.me>
2021-02-25 15:15:25 +00:00
Keith Rothman a30043c8da Fix assorted bugs in FPGA interchange.
Fixes:
 - Only use map constant pins during routing, and not during placement.
 - Unmapped cell ports have no BEL pins.
 - Fix SiteRouter congestion not taking into account initial expansion.
 - Fix psuedo-site pip output.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-23 14:09:28 -08:00
Keith Rothman 184665652e Finish dedicated interconnect implementation.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-23 14:09:28 -08:00
Keith Rothman 2fc353d559 Add initial logic for handling dedicated interconnect situations.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-23 14:09:28 -08:00