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nextpnr
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74 Commits

Author SHA1 Message Date
Eddie Hung 57f8c216b5 Fix compiler warning 2018-12-29 00:21:18 -08:00
Eddie Hung 84485152cc Remove some more ice40 stuff 2018-12-28 15:20:51 -08:00
Eddie Hung 0514fb9042 Merge branch 'xc7' into xc7_gui 2018-12-28 00:03:01 -08:00
Eddie Hung ab35983000 Use std::regex not boost::regex (even though Torc still depends on latter) 2018-12-27 21:25:22 -08:00
Eddie Hung ede0e93206 Merge branch 'xc7' into xc7_gui 2018-12-27 20:53:15 -08:00
Eddie Hung a630758ca7 Cleanup 2018-12-26 18:14:23 -08:00
Eddie Hung a8a00ff3fb Disable entering HROW from INT_[LR].CLK[01] 2018-12-18 18:20:23 -08:00
Eddie Hung b2b02c9c3b Prefer INT/CLB tile as "anchor" tilewire 2018-12-18 16:42:18 -08:00
Eddie Hung 097062c5cb Remove pip_to_dst_wire lookup 2018-12-08 22:49:39 -08:00
Eddie Hung 8c44888466 Fix delay prediction 2018-12-06 17:40:15 -08:00
Eddie Hung 904860b2b4 Add comment 2018-12-06 16:53:48 -08:00
Eddie Hung 66f22150b1 Improve estimateDelay for global clocks 2018-12-06 16:49:35 -08:00
Eddie Hung 5f75a8447f Merge in vx980t support 2018-12-06 20:07:51 +00:00
Eddie Hung c5165f7830 Duplicate arcs.clear() 2018-11-29 16:32:33 -08:00
Eddie Hung 6985e80c01 Merge branch 'xc7' of gitlab.com:eddiehung/nextpnr into xc7 2018-11-29 13:32:32 -08:00
Miodrag Milanovic 535fc953d4 Use site x location to determine if it is one block or other 2018-11-29 12:44:02 -08:00
Miodrag Milanovic 1f387d44fb Use site x location to determine if it is one block or other 2018-11-29 21:12:56 +01:00
Miodrag Milanovic b7a06a02c4 Display slices 2018-11-29 20:54:46 +01:00
Eddie Hung 4161856d49 Add support for MMCME2_ADV 2018-11-28 22:34:22 -08:00
Miodrag Milanovic 105c148848 Made Pip and Wires trees work 2018-11-28 19:49:28 +01:00
Miodrag Milanovic bfa2157ae6 compile fix for gui and proper size 2018-11-28 17:59:58 +01:00
Miodrag Milanovic f2fecc3c69 make gui run 2018-11-28 17:04:26 +01:00
Eddie Hung 13e7798b34 Fix #endif placement 2018-11-27 18:11:19 -08:00
Eddie Hung 212b03999b Gzip the torc_info data 2018-11-27 18:08:03 -08:00
Eddie Hung 440802bf9d Add support for serialization of torc_info 2018-11-27 17:55:31 -08:00
Eddie Hung 662733c171 Remove methods 2018-11-27 14:12:25 -08:00
Eddie Hung a0b6d3b19b clangformat 2018-11-27 12:28:48 -08:00
Eddie Hung ae9ccfa5ad Refactor torc_info constructor 2018-11-27 12:28:21 -08:00
Eddie Hung fc015d28d3 Fix pip indexing, do not allow fabric to connect to CLK (only global network can) 2018-11-20 17:41:46 -08:00
Eddie Hung fa3e390e5f Add TODO 2018-11-20 14:43:21 -08:00
Eddie Hung 18cee5d279 More changes for upstream 2018-11-20 14:26:29 -08:00
Eddie Hung 72a16004e1 Divide columns by 2 to get better X estimate for tiles 2018-11-13 09:01:24 -08:00
Eddie Hung 75654a69f0 Fix LUT input delays, speedup construct_wire_to_delay? 2018-11-11 14:15:11 -08:00
Eddie Hung 99f5836b0e Add some cell delays 2018-11-10 19:55:22 -08:00
Eddie Hung f6bdd92640 Implement Arch::getPipName() and remove debug/verbose before routing 2018-11-10 16:11:38 -08:00
Eddie Hung 3576509684 Add support for PS7 blocks 2018-11-10 12:51:56 -08:00
Eddie Hung 5c56fab0ab [xc7] Add torc_info->site_index_to_bel lookup; also fix Arch::getBelByName() 2018-11-03 15:56:06 -07:00
Eddie Hung aa7f7d6a97 clangformat 2018-11-03 15:18:26 -07:00
Eddie Hung 4239e3668a [xc7] Make clg400 the default package (Zybo) 2018-11-03 15:02:09 -07:00
Eddie Hung c6bf8aff43 [xc7] Fix timing analysis for constant drivers 2018-11-03 14:24:29 -07:00
Eddie Hung 8f1c91151b Revert "[xc7] Fix getPortTimingClass for IOBs" 
This reverts commit 5d9019994e.
 2018-11-03 13:30:58 -07:00
Eddie Hung 5d9019994e [xc7] Fix getPortTimingClass for IOBs 2018-11-03 12:55:36 -07:00
Eddie Hung 324ff41f13 Fix Torc path 2018-11-03 12:10:21 -07:00
Eddie Hung 834f5f58c2 Fix wire delays, disable BUFG I->O routethrough 2018-09-05 22:24:46 -07:00
Eddie Hung 5214d1dbb5 Segment anchors may not be beginning of wires 2018-09-04 11:05:03 -07:00
Eddie Hung d0916943c5 Extend delays to cover BYP and FAN 2018-09-04 10:41:32 -07:00
Eddie Hung c7f0bdfc1b Move DelayInfo into loop 2018-09-04 10:35:12 -07:00
Eddie Hung db6e81d6c3 Populate Arch::getWireDelay() 2018-09-04 10:11:10 -07:00
Eddie Hung d78f5a1d5b Build a pip_to_dst_wire lookup to speedup routing 2018-09-03 22:59:34 -07:00
Eddie Hung 2eeb59d9f1 Re-enable routing 2018-09-03 22:24:59 -07:00