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12 Commits

Author SHA1 Message Date
gatecat bf63271fe7 ice40: Allow disablement of CE global promotion 
Signed-off-by: gatecat <gatecat@ds0.me>
 2026-07-27 11:32:18 +02:00
gatecat a6a6afa827 ice40: Add noglobal attribute and raise promotion threshold 
Signed-off-by: gatecat <gatecat@ds0.me>
 2026-07-27 11:32:18 +02:00
Sylvain Munaut 49ae495344 ice40: Add support for PLL ICEGATE function 
Technically you can enable it independently on CORE and GLOBAL
output, but this is not exposed in the classic primitive, so
we do the same as icecube2 and enable/disable it for both output
path depending on the argument

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2023-02-01 11:41:35 +01:00
gatecat 76683a1e3c refactor: Use constids instead of id("..") 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-02-16 17:09:54 +00:00
Simon Schubert 88eeafae12 ice40: add RGB_DRV/LED_DRV_CUR support for u4k 2019-06-10 14:04:25 +02:00
David Shah 7a5699891a
Merge pull request #239 from YosysHQ/dsp_casc_dummy_wires 
ice40: Add DSP SIGNEXTIN/OUT and ACCUMCI/O ports
 2019-02-25 08:20:32 +00:00
Simon Schubert 7044f56246 ice40: support u4k 2019-02-23 17:39:20 +01:00
David Shah a05f6b261e ice40: Add DSP SIGNEXTIN/OUT and ACCUMCI/O ports 
Signed-off-by: David Shah <davey1576@gmail.com>
 2019-02-21 20:34:23 +00:00
Sylvain Munaut 325d46e284 ice40/chipdb: Add wires to global network for all cells that can drive it 
The icebox DB is a bit inconsistent in how global network connections
are represented. Here we make it appear consistent by creating ports
on the cells that can drive it.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2018-11-19 18:20:20 +01:00
David Shah d5d9fb27a6 ice40: Validity check for LVDS IO 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-09-24 15:14:28 +01:00
Clifford Wolf f875a37467 Get rid of old iCE40 id_ Arch members 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-08 17:17:16 +02:00
Clifford Wolf e03ae50e21 Get rid of PortPin and BelType (ice40, generic, docs) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-08 17:01:18 +02:00