Commit Graph

64 Commits

Author SHA1 Message Date
Lofty 0492c55efd
ci: test that BUILD_RUST=ON builds (#1459) 2025-03-03 14:44:33 +01:00
YRabbit f3a5024de2
Gowin: Remove nextpnr-gowin (#1318)
Boards with Gowin chips are supported in the Himbaechel architecture
with much greater correctness and a wider range of primitives.

In fact, at the moment the advice “use himbaechel-gowin” immediately
solves a
significant part of the issues opened by users.

Of course, you need to wait for amendments to oss-cad-suite, at least
https://github.com/YosysHQ/oss-cad-suite-build/pull/109

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2025-02-14 00:08:12 +00:00
Miodrag Milanović 284fb3e874
Updating CI to work with ubuntu-latest (#1426)
* Fix build using ubuntu-latest

* Update to latest icestorm
2025-01-20 14:58:51 +00:00
gatecat fcdaf3f86c Remove fpga_interchange
Signed-off-by: gatecat <gatecat@ds0.me>
2024-09-30 13:10:30 +02:00
gatecat b7f91e57a0 Update cached Yosys in CI
Signed-off-by: gatecat <gatecat@ds0.me>
2024-05-17 06:31:43 +02:00
Miodrag Milanovic a65ddff8ba Update workflows 2024-01-29 10:37:55 +01:00
Miodrag Milanovic 1811c71438 update trellis version 2023-10-02 14:49:17 +02:00
YRabbit 77afaf23a5 gowin: use the correct version of apicula 2023-06-20 10:48:48 +02:00
gatecat 57b923a603 himbächel: Initial implementation
Signed-off-by: gatecat <gatecat@ds0.me>
2023-05-13 08:26:41 +02:00
gatecat e3529d3356 machxo2: Global placement and clock routing from nexus
Signed-off-by: gatecat <gatecat@ds0.me>
2023-05-08 10:38:16 +02:00
Miodrag Milanovic 0067bcc615 use latest trellis and add arch tests 2023-05-04 14:23:08 +02:00
Miodrag Milanovic e012f7b4f8 update prjtrellis version 2023-05-04 14:23:08 +02:00
Miodrag Milanovic d7e450b7b6 Update prjtrellis 2023-03-20 09:53:35 +01:00
Miodrag Milanovic 656bfdb819 Update prjtrellis to latest 2023-03-16 15:19:48 +01:00
Miodrag Milanovic d337ab93e6 Update to latest prjtrellis 2023-03-16 13:37:23 +01:00
gatecat 91454515f4 Unbreak CI
Signed-off-by: gatecat <gatecat@ds0.me>
2022-12-02 14:26:13 +01:00
YRabbit b0791a01c9 gowin: update the apicula version
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2022-12-02 08:49:56 +10:00
Miodrag Milanovic 4ffa47d897 Fix python version in CI 2022-10-24 09:42:16 +02:00
Miodrag Milanovic 010b2e5ecf Update CI script 2022-10-24 09:28:34 +02:00
gatecat b950f5cb6d Disable broken and failing interchange CI
Signed-off-by: gatecat <gatecat@ds0.me>
2022-06-21 12:35:13 +01:00
gatecat 92a58a2631 ci: Restructure and move entirely to GH actions from Cirrus
Signed-off-by: gatecat <gatecat@ds0.me>
2022-04-08 18:42:39 +01:00
gatecat 5e9236f9d4 mistral: Updated CLK mux select name
Signed-off-by: gatecat <gatecat@ds0.me>
2022-03-18 18:54:40 +00:00
gatecat 051228c49a
Merge pull request #953 from YosysHQ/gatecat/mistral-updates
mistral: Update to latest upstream
2022-03-18 17:52:47 +00:00
gatecat 29654c52be ci: Fixes for latest RapidWright
Signed-off-by: gatecat <gatecat@ds0.me>
2022-03-17 20:01:44 +00:00
gatecat d8244bb62d mistral: Update to latest upstream
Signed-off-by: gatecat <gatecat@ds0.me>
2022-03-17 19:19:38 +00:00
Olivier Galibert 91a0eb9367 Mistral: fix gpio OE, add hmc bypass support 2022-01-18 22:37:35 +01:00
Olivier Galibert b5fc788153 Sync with the current state of mistral 2022-01-18 15:12:45 +01:00
gatecat 2c43ac992f mistral: Update to latest enum name
Signed-off-by: gatecat <gatecat@ds0.me>
2021-12-22 13:21:18 +00:00
gatecat 61597e14a7 mistral: Bump CI version
Signed-off-by: gatecat <gatecat@ds0.me>
2021-12-12 13:55:06 +00:00
gatecat df061b1a9c mistral: Add 'tools' dir to include path
Signed-off-by: gatecat <gatecat@ds0.me>
2021-12-11 19:07:30 +00:00
Olivier Galibert d51c559ab8 mistral: Sync with yet another reorganization 2021-10-28 11:00:44 +02:00
gatecat 013f3e0b39 interchange: Bump prjoxide version
Signed-off-by: gatecat <gatecat@ds0.me>
2021-10-20 13:50:33 +01:00
Olivier Galibert 8d330f1dc7 mistral: Use the iterators 2021-10-19 22:25:55 +02:00
Olivier Galibert d90de7f696 Sync mistral version in CI 2021-10-17 19:12:26 +02:00
Maciej Dudek 2de1ecfabe Update python-fpga-interchange to v0.0.20
Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
2021-09-23 17:52:47 +02:00
Alessandro Comodi 85cf6562b6 gh: interchange: bump python-interchange tag
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
2021-08-31 11:54:22 +02:00
gatecat f7be385230 mistral: Include mistral generated files in include dirs
Signed-off-by: gatecat <gatecat@ds0.me>
2021-08-15 15:13:31 +01:00
Maciej Dudek 9190bda27d [interchange] Update chipdb and python-fpga-interchange versions
Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
2021-07-14 17:19:30 +02:00
Alessandro Comodi b64642fc99 interchange: bump python-interchange version
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
2021-07-08 16:51:23 +02:00
gatecat 9df05c4f98 interchange: Bump versions
Signed-off-by: gatecat <gatecat@ds0.me>
2021-06-15 16:32:02 +01:00
Alessandro Comodi af520f0f92 interchange: ci: update python-interchange tag
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
2021-06-11 11:19:01 +02:00
gatecat bcc5158eab ci: Bump mistral version
Signed-off-by: gatecat <gatecat@ds0.me>
2021-06-05 13:01:49 +01:00
gatecat 0426ba4e87 interchange: Add LIFCL-40 EVN tests
Signed-off-by: gatecat <gatecat@ds0.me>
2021-06-01 09:52:40 +01:00
gatecat ba69b35501 interchange: Bump versions
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-27 11:21:34 +01:00
gatecat ff48ad83be interchange: Bump versions
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-21 10:00:35 +01:00
Alessandro Comodi 9dce00a4e7 gh-actions: interchange: use commit sha as cache key
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
2021-05-20 19:57:03 +02:00
gatecat 6cef569155 ci: Use GH only for Mistral and fpga-interchange
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-15 15:53:25 +01:00
gatecat 51949d95c3 interchange: Bump version
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-07 10:28:59 +01:00
gatecat 5225550b5b interchange: Bump versions
Signed-off-by: gatecat <gatecat@ds0.me>
2021-04-30 11:42:43 +01:00
gatecat 0e6955a08d interchange: Bump versions
Signed-off-by: gatecat <gatecat@ds0.me>
2021-04-20 10:42:33 +01:00