Commit Graph

20 Commits

Author SHA1 Message Date
Miodrag Milanovic 58cb8a830a Load timing data 2023-10-02 14:49:17 +02:00
Miodrag Milanovic adacaf65f4 additional new constants 2023-08-17 11:18:45 +02:00
Miodrag Milanovic 83f65169a3 different oscilator for XO3D 2023-08-17 11:18:45 +02:00
Miodrag Milanovic a2d08dc79e Made PDPW8KC to work 2023-05-04 14:23:08 +02:00
Miodrag Milanovic 01c631870e pio and iologic missing constants 2023-05-04 14:23:08 +02:00
Miodrag Milanovic 2a35f0292a add constants for new primitives 2023-05-04 14:23:08 +02:00
Miodrag Milanovic 3281ca6717 Add missing muxes for BRAM 2023-05-04 14:23:08 +02:00
Miodrag Milanovic 3a7770dca2 Add missing bel pins 2023-05-04 14:23:08 +02:00
Miodrag Milanovic 1b3283fb7c Add constants for new bels 2023-05-04 14:23:08 +02:00
Miodrag Milanovic aacb36bf15 Use CCU2D cell 2023-05-04 14:23:08 +02:00
Miodrag Milanovic 62ace58204 add missing bind and lutperm 2023-05-04 14:23:08 +02:00
Lofty 235a575267 port ecp5 split slice to machxo2 2023-05-04 14:23:08 +02:00
Miodrag Milanovic 0ce72e1a31 Use TRELLIS primitives 2023-03-20 09:53:35 +01:00
Miodrag Milanovic 6eb5f2a77e Enable wires and add dummy wire type for now 2023-03-16 13:37:23 +01:00
Miodrag Milanovic 7ad9914e51 Extend chipdb with metadata 2023-03-16 13:37:23 +01:00
gatecat 76683a1e3c refactor: Use constids instead of id("..")
Signed-off-by: gatecat <gatecat@ds0.me>
2022-02-16 17:09:54 +00:00
William D. Jones c9487293e9 machxo2: Fix REGMODE identifier (per slice, not per-FF). 2021-02-12 10:36:59 +00:00
William D. Jones b739513894 machxo2: Import constids and BELs into facade_import. 2021-02-12 10:36:59 +00:00
William D. Jones 5c30f95c42 machxo2: Add initial set of constids for packing. 2021-02-12 10:36:59 +00:00
William D. Jones 81d6bc3614 Create sub import of facade DB for 1200 device.
Signed-off-by: William D. Jones <thor0505@comcast.net>
2021-02-12 10:36:59 +00:00