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4,772 Commits 30 Branches 9 Tags 27 MiB
Commit Graph

48 Commits

Author SHA1 Message Date
gatecat 9b51c6e337 clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2024-09-30 14:51:33 +02:00
Miodrag Milanovic 83f65169a3 different oscilator for XO3D 2023-08-17 11:18:45 +02:00
gatecat e3529d3356 machxo2: Global placement and clock routing from nexus 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-05-08 10:38:16 +02:00
Miodrag Milanovic 8fd4735292 handle some SYSCONFIG 2023-05-04 14:23:08 +02:00
Miodrag Milanovic 8c19e6f83a clangformat 2023-05-04 14:23:08 +02:00
Miodrag Milanovic 7ac3d0d901 basic support for few small primitives 2023-05-04 14:23:08 +02:00
Miodrag Milanovic 3281ca6717 Add missing muxes for BRAM 2023-05-04 14:23:08 +02:00
Miodrag Milanovic 8c38e7ba61 Working BRAM 2023-05-04 14:23:08 +02:00
Miodrag Milanovic 19176ab597 Made PLL to work 2023-05-04 14:23:08 +02:00
Miodrag Milanovic a79c2f3209 Add additional pic tiles 2023-05-04 14:23:08 +02:00
Miodrag Milanovic 4b3ae70ca8 support DCC and use spine data 2023-05-04 14:23:08 +02:00
Miodrag Milanovic 6ec3423405 LSRONMUX disable if not used by FF 2023-05-04 14:23:08 +02:00
Miodrag Milanovic 510d92e01b cleanup FF and made DPRAM work in simple case 2023-05-04 14:23:08 +02:00
Miodrag Milanovic a00f810093 fix 2023-05-04 14:23:08 +02:00
Miodrag Milanovic 6f85053b03 more like ecp5 2023-05-04 14:23:08 +02:00
Miodrag Milanovic 3624fe90b2 one step closer 2023-05-04 14:23:08 +02:00
Miodrag Milanovic 6508a0c267 This should not be here 2023-05-04 14:23:08 +02:00
Miodrag Milanovic 62ace58204 add missing bind and lutperm 2023-05-04 14:23:08 +02:00
Miodrag Milanovic 442142a47a typo fixes 2023-05-04 14:23:08 +02:00
Lofty 398b2ab569 bitstream emission update 2023-05-04 14:23:08 +02:00
Miodrag Milanovic b033b915a6 Add bitgen for the rest of XO2 and XO3 2023-05-04 14:23:08 +02:00
Lofty 89c71bc8ac bitstream fixes for xo3 2023-05-04 14:23:08 +02:00
gatecat 6455b5dd26 viaduct: Add support for GUIs 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-04-11 19:11:54 +02:00
Miodrag Milanovic 35eeaa7cc5 Add ramaining PIO tiles 2023-03-20 09:53:35 +01:00
Miodrag Milanovic 0ce72e1a31 Use TRELLIS primitives 2023-03-20 09:53:35 +01:00
Miodrag Milanovic ad5f6fccaa Use RelSlice, make more in line with ecp5 arch 2023-03-20 09:53:35 +01:00
gatecat 4111cc25d6 clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-03-17 09:31:38 +01:00
Miodrag Milanovic 7ad9914e51 Extend chipdb with metadata 2023-03-16 13:37:23 +01:00
gatecat 76683a1e3c refactor: Use constids instead of id("..") 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-02-16 17:09:54 +00:00
William D. Jones 064b6d808e clangformat. 2021-12-16 17:09:29 -05:00
William D. Jones d2ac6dffbc machxo2: Correct which PIO wires get adjusted when writing text bitstream. Add verbose logging for adjustments. 2021-12-16 16:59:37 -05:00
William D. Jones 45c33e9dcf machxo2: Add a special case for pips whose config bits are in multiple 
tiles.
 2021-07-01 09:36:02 -04:00
William D. Jones ec239c8c35 machxo2: Hardcode a rule for emitting U_/D_ or G_ prefixes in ASCII output. 2021-07-01 09:36:01 -04:00
gatecat 2ffb081442 Fixing old emails and names in copyrights 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-06-12 13:22:38 +01:00
gatecat 579b98c596 Use hashlib for core netlist structures 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-06-02 14:27:56 +01:00
gatecat 23413a4d12 Fix compiler warnings introduced by -Wextra 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-02-25 15:15:25 +00:00
gatecat 8f5133d811 machxo2: Use snake_case for non-ArchAPI functions 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-02-12 10:36:59 +00:00
gatecat 3f7618283d machxo2: Update with Arch API changes 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-02-12 10:36:59 +00:00
William D. Jones f18df5ed59 machxo2: Don't write out config bits for cells without location info. 2021-02-12 10:36:59 +00:00
William D. Jones da1b15d6f5 machxo2: Special-case left and right I/O wire names in ASCII generation. 2021-02-12 10:36:59 +00:00
William D. Jones 0250aaaddd machxo2: clang format. 2021-02-12 10:36:59 +00:00
William D. Jones 0d00c10e2f machxo2: Add bitstream generation for OSCH. 2021-02-12 10:36:59 +00:00
William D. Jones 884e7d9a98 machxo2: Add basic bitstream generation for PIC tiles and I/O. 2021-02-12 10:36:59 +00:00
William D. Jones d485dc6ef6 machxo2: Add REGMODE to bitstream output. 2021-02-12 10:36:59 +00:00
William D. Jones 5415194b39 machxo2: Checkpoint commit for slice bitstream generation. 2021-02-12 10:36:59 +00:00
William D. Jones cf2db7a4c4 machxo2: Write out pips to bitstream. 2021-02-12 10:36:59 +00:00
William D. Jones 56656b2b24 machxo2: Emit empty bitstream file. 2021-02-12 10:36:59 +00:00
William D. Jones 75f33e0c55 machxo2: Add stub bitstream writer plus support files. 2021-02-12 10:36:59 +00:00