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4,772 Commits 32 Branches 9 Tags 27 MiB
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9 Commits

Author SHA1 Message Date
gatecat d3c0f945da xilinx: Fix BRAM placement, clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2024-09-27 16:24:47 +02:00
Adrien Prost-Boucle 437fb70ed3 Himbaechel xilinx : Fix packing of cascaded DSP 2024-09-24 12:06:56 +02:00
Adrien Prost-Boucle 9da05b6001 Himbaechel xilinx : DSP packing : Emit a non-fatal error message 2024-09-24 12:06:56 +02:00
Adrien Prost-Boucle 81bf92a855 Himbaechel xilinx : DSP packing : Disable clustering 2024-09-24 12:06:56 +02:00
Adrien Prost-Boucle 8a0e062520 Himbaechel xilinx : DSP packing : Improve code efficiency 2024-09-24 12:06:56 +02:00
Adrien Prost-Boucle 9bea22ed1e Himbaechel xilinx : DSP packing : Fix identification of cascaded ports and share identification code 2024-09-24 12:06:56 +02:00
Adrien Prost-Boucle ad9a54cc69 Himbaechel xilinx : More cascaded input ports for which routing is skipped 2024-09-24 12:06:56 +02:00
Adrien Prost-Boucle 04f5f80766 Himbaechel xilinx : Add safety check in DSP packing for 7-series 2024-09-24 12:06:56 +02:00
Adrien Prost-Boucle db0c99199e Himbaechel xilinx : Add support of DSP packing for 7-series 2024-09-24 12:06:56 +02:00