Commit Graph

848 Commits

Author SHA1 Message Date
Keith Rothman c99fbde0eb Mark IdString and IdStringList single argument constructors explicit.
Single argument constructors will silently convert to that type.  This
is typically not the right thing to do.  For example, the nexus and
ice40 arch_pybindings.h files were incorrectly parsing bel name strings,
etc.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-04 16:38:07 -08:00
D. Shah a09a62bc4a ice40: Use snake case for arch-specific functions
This makes the difference clearer between the general arch API that
everyone must implement; and helper functions specific to one arch.

Signed-off-by: D. Shah <dave@ds0.me>
2021-02-03 10:46:12 +00:00
D. Shah b31b21fd51 ice40: Implement IdStringList for all arch object names
Signed-off-by: D. Shah <dave@ds0.me>
2021-02-02 17:00:33 +00:00
D. Shah 9388df19d3 refactor: Replace getXName().c_str(ctx) with ctx->nameOfX
This makes the ongoing migration to IdStringList easier.

Signed-off-by: D. Shah <dave@ds0.me>
2021-02-02 17:00:14 +00:00
D. Shah ff92d19fed arch: Add getNameDelimiter API for string lists
Signed-off-by: D. Shah <dave@ds0.me>
2021-02-02 16:59:40 +00:00
Keith Rothman da74a425d2 Run "make clangformat".
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-02 07:44:49 -08:00
Keith Rothman 9089ee2d16 Add pybindings for new APIs.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-02 07:43:36 -08:00
Keith Rothman 9fe546f279 Rename Partition -> BelBucket.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-02 07:34:56 -08:00
Keith Rothman 0338368afa Add Partition APIs to ice40, nexus, gowin archs.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-02 07:34:56 -08:00
Keith Rothman 2285c8dbbd Initial refactoring of placer API.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-02 07:34:56 -08:00
Keith Rothman 5cf2f8d1ea Seperate PipRange types in pybindings_shared.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-01 10:23:21 -08:00
D. Shah 94e8847d67 cleanup: Spelling fixes
Signed-off-by: D. Shah <dave@ds0.me>
2021-01-28 15:19:06 +00:00
D. Shah 6ecf7f86c8 cleanup: Remove dead/unused code
Note that some '#if 0' code that might still be useful for debugging in
the future has been retained.

Signed-off-by: D. Shah <dave@ds0.me>
2021-01-28 14:59:13 +00:00
D. Shah 75ee2fc4e6 Move RelPtr/RelSlice out of arches into common
The bba approach seems widely used enough that it's reasonable for this
to become part of common code.

Signed-off-by: D. Shah <dave@ds0.me>
2021-01-27 20:43:01 +00:00
D. Shah c10238de8c ice40: Switch from RelPtr to RelSlice
This replaces RelPtrs and a separate length field with a Rust-style
slice containing both a pointer and a length; with bounds checking
always enforced.

Thus iterating over these structures is both cleaner and safer.

Signed-off-by: D. Shah <dave@ds0.me>
2021-01-27 18:35:49 +00:00
David Shah 74c4fa6751 ice40: Nicer error for unconstrained SB_GB_IO
Signed-off-by: David Shah <dave@ds0.me>
2020-12-27 20:11:08 +00:00
Tim Callahan c967f8e434 Use std::string::find(char c) when searching for a single character.
Signed-off-by: Tim Callahan <tcal@google.com>
2020-12-16 20:07:56 -08:00
David Shah 92ef01830c ice40: Clarify feedback paths in PLL constraints code
Signed-off-by: David Shah <dave@ds0.me>
2020-12-03 11:40:00 +00:00
David Shah 940b7efa15 ice40: Derive PLL timing constraints
Signed-off-by: David Shah <dave@ds0.me>
2020-12-03 09:55:30 +00:00
David Shah 8686b6dada RelPtr: remove copy constructor and copy assignment
These operations are meaningless for a data structure that references
another structure relative to its location.

Signed-off-by: David Shah <dave@ds0.me>
2020-11-13 20:19:53 +00:00
Sylvain Munaut bdc95b8dc0 ice40/pack/SB_PLL: Force fixed value to 4'b1111 if dynamic delay is used
It's been confirmed that :
 (1) this is required by the hardware
 (2) icecube will force that field to 4'b1111 in fixed mode

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2020-11-10 10:24:58 +01:00
David Shah b18ea204c2 Remove wire alias API
It has not actually been implemented in any router for over 2.5 years and causes nothing more than confusion. It can always be added back if it forms part of a future solution; possibly as part of a more general database structure rethink.

Signed-off-by: David Shah <dave@ds0.me>
2020-10-15 09:36:15 +01:00
whitequark f6d436d58b
CMake: fix Windows-ism in status message 2020-08-26 09:51:38 +00:00
William D. Jones e63270f918 Fix MESSAGE indicating where externally-built .bbas live. 2020-08-22 21:09:21 -04:00
Miodrag Milanovic 8f2b707d02 Initial conversion to pybind11 2020-07-23 18:35:18 +02:00
Sylvain Munaut 33067130e5 ice40: If IO is used by SB_GB_IO, can't use it for PLL
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2020-07-09 13:04:19 +02:00
Miodrag Milanovic 2726f3af91 Fixes for new part types 2020-07-08 16:45:27 +02:00
Miodrag Milanovic 1fae965cbb Use proper names in GUI 2020-07-08 14:16:00 +02:00
Miodrag Milanovic 32ddc94b4f Support rest of parts 2020-07-08 14:09:44 +02:00
Miodrag Milanovic b45b375ff2 Missed adding option 2020-07-08 13:45:34 +02:00
Miodrag Milanovic 6991a53d68 Adding LP4K as well 2020-07-08 13:44:13 +02:00
Miodrag Milanovic 3be76a837d Support 4K parts directly 2020-07-08 13:22:59 +02:00
David Shah 137241cfef
Merge pull request #463 from YosysHQ/fix-archcheck
Fix arch checks, and add these to CI
2020-07-02 13:32:30 +01:00
whitequark f6e30f22f4 CMake: fix path checks in chipdb build scripts.
`if(NOT DEFINED)` is not appropriate since a variable that contains
`-NOTFOUND` still counts as `DEFINED`. This can cause issues if
configuration fails, writes `-NOTFOUND` to the cache, and is then
restarted.
2020-07-01 20:22:21 +00:00
David Shah b24e0a609b ice40: Fix getBelsByTile
Signed-off-by: David Shah <dave@ds0.me>
2020-06-29 19:52:31 +01:00
Miodrag Milanovic 929a1cc7e4 Make python bindings consistent 2020-06-27 13:24:30 +02:00
Miodrag Milanovic 7a95629aff Fix clangformat and execute it 2020-06-27 13:20:16 +02:00
Miodrag Milanovic 901ad4e917 Update git ignore locations 2020-06-27 13:18:06 +02:00
whitequark 89e0cc8078 Simplify and improve chipdb embedding/loading. 2020-06-26 08:36:07 +00:00
whitequark bf8d4c428e CMake: require at least version 3.5 (Ubuntu 16.04). 2020-06-25 14:03:37 +00:00
whitequark 1dc1164dce CMake: rewrite chipdb handling from ground up. 2020-06-25 14:03:37 +00:00
Sylvain Munaut 9b71bba747 ice40: Add fallback behavior for Extra Cell config bits vectors
This helps make new nextpnr compatible with old chipdbs when a parameters
goes from single bit to multi bit.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2020-06-02 20:21:16 +02:00
Sylvain Munaut 5e2b6bcef9 ice40: Add support for the 2nd bit of SHIFTREG_DIV_MODE
This requires the matching chipdb update from icestorm project !

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2020-06-02 11:03:04 +02:00
David Shah f44498a530
Merge pull request #447 from whitequark/wasi
Port nextpnr-{ice40,ecp5} to WASI
2020-05-24 14:23:35 +01:00
whitequark e7bb04769d Port nextpnr-{ice40,ecp5} to WASI.
This involves very few changes, all typical to WASM ports:
  * WASM doesn't currently support threads or atomics so those are
    disabled.
  * WASM doesn't currently support exceptions so the exception
    machinery is stubbed out.
  * WASM doesn't (and can't) have mmap(), so an emulation library is
    used. That library currently doesn't support MAP_SHARED flags,
    so MAP_PRIVATE is used instead.

There is also an update to bring ECP5 bbasm CMake rules to parity
with iCE40 ones, since although it is possible to embed chipdb into
nextpnr on WASM, a 200 MB WASM file has very few practical uses.

The README is not updated and there is no included toolchain file
because at the moment it's not possible to build nextpnr with
upstream boost and wasi-libc. Boost requires a patch (merged, will
be available in boost 1.74.0), wasi-libc requires a few unmerged
patches.
2020-05-23 20:57:26 +00:00
Nathaniel Graff 08f68518f2 Fix spelling of 'unsupported'
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
2020-05-13 20:00:37 -07:00
David Shah 98e2f9ea81 ice40: Derive oscillator frequency constraints
Signed-off-by: David Shah <dave@ds0.me>
2020-03-29 21:02:16 +01:00
Sylvain Munaut bd68d6035c ice40: Fix output register timing analysis for registered output enable
Wrong bits were being tested. [5:4] is what's controlling the output
enable path.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2020-03-29 10:27:42 +02:00
David Shah a621e04062 ice40: Always copy DFF attrs to LC
Signed-off-by: David Shah <dave@ds0.me>
2020-03-19 21:35:31 +00:00
David Shah bb73580209
Merge pull request #400 from YosysHQ/dave/tri-fixes
Improve handling of unused inout port bits
2020-03-10 13:50:59 +00:00