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nextpnr
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210 Commits 28 Branches 9 Tags 31 MiB
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13 Commits

Author SHA1 Message Date
Clifford Wolf aa4fedfd54 Add A*-like optimizations to router 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-13 16:52:21 +02:00
Clifford Wolf a139654980 Add IdString API 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-12 15:08:01 +02:00
Clifford Wolf d62e341d5a Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr 2018-06-12 14:25:12 +02:00
Clifford Wolf 391d49c13e Add nextpnr namespace 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-12 14:24:59 +02:00
David Shah 47eeda40bc Implement the placement validity checker 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 13:45:59 +02:00
Clifford Wolf be73894bea Add "nextpnr.h" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-11 20:12:57 +02:00
Clifford Wolf 70f322ab44 Renamed LOC attribute to BEL, fix ice40 IO bel names 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-09 19:52:22 +02:00
David Shah 72f5e640af Adding basic placement constraints 
Specify the attribute (* LOC="bel_name" *) on any cell to constrain its
placement to that bel.

Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-09 19:38:37 +02:00
Clifford Wolf 208d378322 Remove writing on sell types to cout (left over debug output?) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-09 15:20:13 +02:00
ZipCPU 4499864024 Applied clang-format to my own contributions 2018-06-07 15:38:24 -04:00
Clifford Wolf 37d2fc65b1 Fix placer build for dummy arch 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-07 17:50:36 +02:00
ZipCPU c352f6536b Moved placer definitions to place.h, main automatically runs placer now 2018-06-07 09:49:21 -04:00
ZipCPU f32b9622d5 Initial (random) placer capability 
This commit also includes changes to jsonparse to allow it to
1) recognize ports with no connection, and set their net pointers to NULL
2) recognize designs with a ports node rather than a ports_direction

The rule checker has also been modified to accommodate possible NULL netlists

The ice40 chip now also has iterator operations ++bi and bi++.
 2018-06-07 09:38:14 -04:00