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929 Commits

Author SHA1 Message Date
Clifford Wolf 4d14bc2914 Merge remote-tracking branch 'origin/master' into chipdbng 2018-06-16 15:25:03 +02:00
Clifford Wolf 6acf23cf37 Some refactoring of Chip API (prep for chipdb refactoring) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-16 15:23:04 +02:00
David Shah 7ff1b7e02f ice40: Fix RAM config in packer 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-16 14:44:10 +02:00
David Shah f079e0d204 ice40: Fix BRAM initialisation 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-16 14:44:10 +02:00
David Shah c0a2627179 place: Tidying up the SA placer 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-16 14:44:10 +02:00
David Shah c9a784ec0c ice40: Include RAM init data in bitstream 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-16 14:44:10 +02:00
David Shah 04f1d7516a ice40: Fix bitstream generation when parameters are unspecified 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-16 14:44:10 +02:00
David Shah 23b1fc02fb ice40: Bitstream generation for RAM 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-16 14:44:10 +02:00
David Shah cabdfe3616 ice40: Only place IO at valid pins 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-16 14:44:10 +02:00
David Shah 6b74d326d4 experiment: Simple heuristic-based placer 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-16 14:44:10 +02:00
David Shah 355d33632c ice40: Another arch_place fix 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-14 21:52:01 +02:00
David Shah 66ea22bb5c ice40: General fixes 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-14 21:12:15 +02:00
David Shah 323a2aaa54 ice40: Read cells in arachne placement script 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-14 20:55:39 +02:00
David Shah 0f0d9bfb00 ice40: Importer for placed ice40 designs from arachne 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-14 20:46:05 +02:00
Clifford Wolf 312699e590 Add route-ripup routing loop 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-14 15:09:13 +02:00
Clifford Wolf 7787ce5fd9 Refactor position/delay estimation API 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-14 12:43:00 +02:00
Clifford Wolf c94b8c4861 Drastically reduce number of linker symbols in chipdb 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-13 23:55:18 +02:00
David Shah 537b0e6e94 ice40: Rename ICESTORM_RAM pins 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-13 18:18:57 +02:00
Clifford Wolf 1a3d0f2f5d Add picorv32_top module with fewer IO pins 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-13 17:38:34 +02:00
Clifford Wolf 33863fee2d Add missing iCE40 global buffer bels 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-13 17:19:36 +02:00
Clifford Wolf 821fb3a55d Add test PicoRV32 build script 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-13 17:08:27 +02:00
Clifford Wolf 81a154ca5d Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr 2018-06-13 16:54:25 +02:00
Clifford Wolf aa4fedfd54 Add A*-like optimizations to router 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-13 16:52:21 +02:00
David Shah 5af707a0b6 ice40: Pack RAMs 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-13 16:26:21 +02:00
David Shah 14b5e46b5d ice40: Promote one clock to a global buffer 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-13 15:10:42 +02:00
Clifford Wolf d80e60cce2 Add hierarchy to bel/wire/pip names 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-13 14:53:44 +02:00
David Shah 9374ef29bf Fixing implementation of constants 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-13 14:01:42 +02:00
David Shah 4694c6aae7 ice40: Update examples to use packer/pcf 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-13 12:55:08 +02:00
Clifford Wolf 1e314cc0ce Update chip Graphics API 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-13 12:48:58 +02:00
Clifford Wolf 145c849596 Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr 2018-06-13 12:38:28 +02:00
Clifford Wolf 4d7f18dd98 Redesign PosInfo API 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-13 12:37:23 +02:00
David Shah de0918c287 ice40: Add a PCF parser 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-13 12:30:15 +02:00
David Shah 5435a97024 ice40: Add package selection 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-13 11:51:09 +02:00
David Shah 696aaee24c ice40: Add package pins to database 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-13 11:40:28 +02:00
David Shah 94eea289ae Simple IO buffer insertion, enable packer by default 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-13 11:08:20 +02:00
David Shah a76f5c5678 Remove IO buffers when fed by SB_IO 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-13 10:50:05 +02:00
Miodrag Milanovic b7c747f15b Write tests to replace -test option from main 2018-06-12 20:39:20 +02:00
Miodrag Milanovic 9953012154 reveresed logic for enabling main file, and made tests link arch files 2018-06-12 19:56:03 +02:00
Clifford Wolf 136ce3d18f Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr 2018-06-12 15:51:51 +02:00
Clifford Wolf 9c275d0a65 Add fast IdString <-> PortPin conversion 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-12 15:50:33 +02:00
David Shah 6e79b93c6e Improve packer diagnostics 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 15:33:53 +02:00
David Shah 6707b985b4 ice40: Add support for LC placement constraints in packer 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 15:13:50 +02:00
Clifford Wolf a139654980 Add IdString API 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-12 15:08:01 +02:00
David Shah 592a627e0c Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr 2018-06-12 14:43:56 +02:00
David Shah 5a9ff4aea1 ice40: Testing the placement validity check 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 14:39:49 +02:00
Clifford Wolf c8b815361e Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr 2018-06-12 14:33:13 +02:00
Clifford Wolf 426fb75bb5 Fix NEXTPNR_NAMESPACE 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-12 14:31:26 +02:00
David Shah 95fb0595a5 ice40: Debugging and fixing FF configuration 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 14:27:04 +02:00
Clifford Wolf d62e341d5a Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr 2018-06-12 14:25:12 +02:00
Clifford Wolf 391d49c13e Add nextpnr namespace 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-12 14:24:59 +02:00
David Shah 9ee6a6e114 ice40: Creating packer tests 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 14:19:26 +02:00
David Shah 47eeda40bc Implement the placement validity checker 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 13:45:59 +02:00
David Shah 031d8e811f ice40: Adding a placement validity checker 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 13:40:22 +02:00
David Shah 67a5cedbe3 ice40: Pack constants to LCs 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 13:09:36 +02:00
David Shah f72807f790 ice40: Debugging the packer 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 12:46:30 +02:00
David Shah 2f61a9b98a ice40: Start working on a packer, currently not tested 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 12:13:11 +02:00
David Shah 5f813410aa ice40: Adding cell utilities for packing 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 11:49:54 +02:00
David Shah 19aefe374c ice40: Optimising chipdb builds 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 10:39:33 +02:00
Clifford Wolf be73894bea Add "nextpnr.h" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-11 20:12:57 +02:00
Clifford Wolf ac67482380 Remove pool, dict, vector namespace aliases 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-11 19:56:33 +02:00
Clifford Wolf f63eec034f Add conflicting=false argument to bind getters 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-11 19:46:03 +02:00
Miodrag Milanovic b4b5586efd Fixed portability issue, now it works on msys2 windows build as well 2018-06-11 09:33:42 +02:00
Miodrag Milanovic 67227847e5 Pass design to gui, display chip name 2018-06-10 18:25:23 +02:00
David Shah d3f1112580 Improving 5k support 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 17:20:29 +02:00
Clifford Wolf 458a13456a Fix iCE40 routing graph 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-10 17:08:14 +02:00
Clifford Wolf 602e6fab1e Add support for iCE40 global buffers (currently only for 1k devices) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-10 16:31:06 +02:00
David Shah 02b83d6db6 Debugging on icebreaker 2018-06-10 15:06:26 +02:00
Clifford Wolf 032c94d094 Add blinky post-synthesis testbench 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-10 14:31:38 +02:00
Clifford Wolf 4a79e70470 Fix ice40 pip/switch locked performance issue 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-10 14:08:00 +02:00
David Shah 8d5da98122 ice40: Set config bits for unused IO 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 13:38:34 +02:00
David Shah 4e6d6e632f ice40: Fix techmap 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 13:33:47 +02:00
David Shah 30e672313d ice40: Add IO config to bitstream 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 13:24:48 +02:00
David Shah d0bd657551 ice40: Write logic cell config to bitstream 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 12:58:05 +02:00
David Shah 6da8f98eac ice40: Lock out mutually exclusive pips 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 12:17:55 +02:00
David Shah 827a43c88c ice40: Start adding routing to asc output 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 12:11:58 +02:00
David Shah d0431225f1 ice40: Writing an empty ASC file 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 11:56:07 +02:00
David Shah 89d5280bf6 ice40: Adding non-routing config bits to database 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 11:14:50 +02:00
David Shah 48b72126c9 ice40: Add switch data to database 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 10:54:55 +02:00
Clifford Wolf 70f322ab44 Renamed LOC attribute to BEL, fix ice40 IO bel names 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-09 19:52:22 +02:00
David Shah 72f5e640af Adding basic placement constraints 
Specify the attribute (* LOC="bel_name" *) on any cell to constrain its
placement to that bel.

Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-09 19:38:37 +02:00
Clifford Wolf 8cabb39d6d Getting rid of .nil() methods, compare with zero- and default-constructed objects instead 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-09 18:41:38 +02:00
Clifford Wolf dfbfbf87db Add very basic router 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-09 18:19:20 +02:00
David Shah c16a971c0f python: Fixing builds as importable module 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-08 11:17:04 +02:00
David Shah 7f330af9f3 Reformat remaining files 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-08 11:04:02 +02:00
ZipCPU 4499864024 Applied clang-format to my own contributions 2018-06-07 15:38:24 -04:00
ZipCPU c13c15bada Set the default log to stdout 2018-06-07 09:52:32 -04:00
ZipCPU c352f6536b Moved placer definitions to place.h, main automatically runs placer now 2018-06-07 09:49:21 -04:00
ZipCPU f32b9622d5 Initial (random) placer capability 
This commit also includes changes to jsonparse to allow it to
1) recognize ports with no connection, and set their net pointers to NULL
2) recognize designs with a ports node rather than a ports_direction

The rule checker has also been modified to accommodate possible NULL netlists

The ice40 chip now also has iterator operations ++bi and bi++.
 2018-06-07 09:38:14 -04:00
David Shah 1d39924c14 ice40: More Python bindings and examples 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-07 15:04:07 +02:00
David Shah 547d4fe3ee ice40: Refactor PortPin and add Python binding 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-07 14:36:35 +02:00
ZipCPU efd8722fd9 Connected the log file facility to stderr 2018-06-07 08:12:22 -04:00
ZipCPU 0dbfa4662f Preliminary placer changes to main 2018-06-07 07:52:05 -04:00
David Shah 024ff8fa7d cmake: Add HX1K-only builds support 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-07 13:20:16 +02:00
David Shah c3e0252703 Reformat Python bindings and ice40 main 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-07 13:10:53 +02:00
David Shah 6236a10427 Fixing file->run renaming 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-07 13:08:18 +02:00
David Shah 9ebc879826 Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr 2018-06-07 12:59:41 +02:00
David Shah 66b36cdd45 Merge branch 'python' 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-07 12:59:27 +02:00
David Shah b0e66d441c Global design object working 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-07 12:57:52 +02:00
Clifford Wolf 1ea8fa4881 clang-format for design and chip codebase 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-07 12:56:49 +02:00
Clifford Wolf 2edde06c07 Fix clang-format include order issues 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-07 12:48:53 +02:00
David Shah a5249da02d Working on global Python design object 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-07 12:40:31 +02:00
Clifford Wolf 8bfeaeaced Add ICE40_HX1K_ONLY config macro 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-07 12:26:02 +02:00
Clifford Wolf 9eeecf0e62 Rename --file to --run 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-07 12:19:48 +02:00
David Shah 0f6ebd6384 Allow specifying multiple Python files on the command line 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-07 09:01:30 +02:00
David Shah bdd9313582 Allow loading and running Python files before GUI starts 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-07 08:56:54 +02:00
ZipCPU 16b9a2f1b5 Attempt to add JSON parser--not working yet w/ build system 2018-06-06 14:44:54 -04:00
Clifford Wolf f9bd66e7ac Add iCE40 device selection, improve iCE40 IO GraphicElements 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-06 17:23:58 +02:00
Clifford Wolf 28e2276906 Add simple SVG generator to ice40 main 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-06 17:08:31 +02:00
Clifford Wolf 72b4bba0e7 Add ice40 geometry information 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-06 16:42:42 +02:00
Clifford Wolf f07682f515 Add ice40 --test mode 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-06 16:01:31 +02:00
Clifford Wolf 5ff9aafb20 Refactor Chip API and iCE40 database 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-06 15:13:41 +02:00
Miodrag Milanovic 7cb42f4368 Initial GUI work 2018-06-05 21:03:06 +02:00
ZipCPU 709ce3884d Initial JSON parser 2018-06-05 09:01:26 -04:00
Clifford Wolf d13a84b687 Add iCE40 blockram bels 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-04 12:37:56 +02:00
Clifford Wolf eb3c89bee9 Replace GuiLine with GraphicElement 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-04 12:02:58 +02:00
Clifford Wolf 6840ffd9c0 Add iCE40 SB_IO bels 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-03 16:16:59 +02:00
Clifford Wolf 20d7cd0194 Add ice40 ICESTORM_LC bels 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-02 15:00:33 +02:00
Clifford Wolf d85f5d2285 Remove now obsolete ice40/makefile.inc 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-02 14:49:32 +02:00
David Shah e6302bbe73 Fix race condition and optimise the build 2018-06-02 14:17:31 +02:00
David Shah 363ddd0f3c Python bindings working on both architectures 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-02 13:48:28 +02:00
David Shah d3f74eb056 Simple Python test working 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-02 13:48:28 +02:00
David Shah f353453a7f Add architecture specific Python defs 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-02 13:48:28 +02:00
David Shah ee0a5374d8 Add a CMake based build system 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-02 13:48:28 +02:00
Clifford Wolf cdb31fdafc Use singular in type names (BelRange, WireIterator) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-02 12:57:19 +02:00
Clifford Wolf 90c7e3b13d Add iCE40 blinky example 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-05-31 18:10:36 +02:00
Clifford Wolf 3b0d1beabb Add DelayInfo struct 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-05-29 20:04:29 +02:00
Clifford Wolf d56e29c47e Progress in chip.h API 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-05-26 16:08:20 +02:00
Clifford Wolf 757786f134 Progress in ice40 chipdb 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-05-26 14:56:30 +02:00
Clifford Wolf 1899833b4d Start work on iCE40 chipdb 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-05-26 14:27:28 +02:00