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31 Commits

Author SHA1 Message Date
Adam Greig 8d8c244e00
Add remapping of DSP clk/ce/rst signals in a block. 
Each DSP block contains two slices, and each slice contains multiple
MULT18X18D and ALU54B units. Each unit configures each register to use
any of CLK0/1/2/3, CE0/1/2/3, and RST0/1/2/3 ports, and the ports are
connected per unit (so for example, two MULTs in the same block could
connect their CLK0s to different external signals). However, the
hardware only has one actual port per block, so it's required that
all CLK0 signals within a block are the same.

Because the packer is in general allowed to combine two unrelated units
into one block, it may end up combining units that use different signals
for the same port, which would eventually have caused a router failure.

This commit adds validity checks which ensure only unique signals are
used per block, and adds remapping so that conflicting signals are
automatically reassigned when possible and required.
 2023-01-04 18:34:30 +00:00
gatecat efb58711b0 ecp5: Split the SLICE bel into separate LUT/FF/RAMW bels 2022-04-07 18:02:36 +01:00
gatecat 76683a1e3c refactor: Use constids instead of id("..") 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-02-16 17:09:54 +00:00
gatecat 81c549549d ecp5: Add DCSC support 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-07-06 11:45:37 +01:00
Miodrag Milanovic 796d648995 Merge remote-tracking branch 'origin/master' into mmicko/ecp5_gui 2019-12-28 13:54:06 +01:00
Miodrag Milanovic 50f87a6024 add newline at eof 2019-12-28 13:51:02 +01:00
Miodrag Milanovic b271e59472 Add global wires 2019-12-15 17:20:48 +01:00
Miodrag Milanovic ebbfb6375d more new wires added 2019-12-14 09:18:24 +01:00
Miodrag Milanovic 2a5f0bbd28 new wires in db 2019-12-13 18:24:49 +01:00
Miodrag Milanovic c0585e98eb added siologic 2019-12-13 14:32:27 +01:00
Miodrag Milanovic 16f6aaa68c Add many new wires 2019-12-13 14:01:28 +01:00
David Shah bac8335222 ecp5: Add constids for new timing cell types 
Signed-off-by: David Shah <dave@ds0.me>
 2019-10-26 20:50:50 +01:00
Miodrag Milanovic d1feb2aa2d display horizontal wires, add some globals to list 2019-10-23 18:17:08 +02:00
Miodrag Milanovic e69bb4c077 Simplify layout of elements 2019-10-20 09:41:48 +02:00
Miodrag Milanovic 8c79044d43 more wires between switchboxes 2019-10-20 09:41:48 +02:00
Miodrag Milanovic 28d0313ccc Less types needed 2019-10-20 09:41:48 +02:00
Miodrag Milanovic eafc0e4e9e Added type to wire 2019-10-20 09:41:48 +02:00
David Shah a14555c8d1 ecp5: Add IDDR71B support 
Signed-off-by: David Shah <dave@ds0.me>
 2019-10-09 12:07:56 +01:00
David Shah 9b83e67460 ecp5: Preparations for new IO bels 
Signed-off-by: David Shah <dave@ds0.me>
 2019-10-09 10:55:10 +01:00
David Shah 2da41a66c7 ecp5: Conservative analysis of comb DSP timing 
Signed-off-by: David Shah <dave@ds0.me>
 2019-07-08 15:09:54 +01:00
David Shah 63e1f02c65 ecp5: Helper functions for DQS and ECLK 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-24 10:28:25 +01:00
David Shah e929d221f3 ecp5: Adding DTR, OSCG, CLKDIVF, USRMCLK, JTAGG 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-08 12:34:22 +00:00
David Shah b12a8c1a30 ecp5: Add {S}IOLOGIC constids and cell 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-12 19:08:48 +00:00
David Shah 18813f2056 ecp5: Adding real timing data to database 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-16 13:26:28 +00:00
David Shah e9fe444dc7 ecp5: Adding ancillary DCU bels 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-15 11:30:27 +00:00
David Shah cc9fb1497d ecp5: Groundwork for DCU support 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-15 11:30:27 +00:00
David Shah e005cc6754 ecp5: Add PLL support 
Signed-off-by: David Shah <dave@ds0.me>
 2018-10-31 19:52:41 +00:00
David Shah 1a06f4b2bd ecp5: Adding DSP support 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-10-21 20:07:18 +01:00
David Shah 48f08e6d39 ecp5: Adding constids for blockram 
Signed-off-by: David Shah <dave@ds0.me>
 2018-10-05 10:54:30 +01:00
David Shah 97b12fa741 ecp5: Add DCC Bels, fix global router post-rebase 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-09-29 16:09:21 +01:00
David Shah a3ae3f9791 ecp5: Update to use const IdStrings in place of PortPin/BelType 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-08 19:08:43 +02:00