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the following: (1) Checking that the parent cell is verilog, (2) only running after the two cells themselves have been compared and matched, then (3) added the missing pin or pins while reordering pins on instances (note: this may not work if the verilog netlist is the first passed to netgen; that case needs to be checked).
2 lines
8 B
Plaintext
2 lines
8 B
Plaintext
1.5.266
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