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6 Commits
Author SHA1 Message Date
Tim Edwards 5cd68b9ef1 Merge branch 'master' into work 2017-06-18 22:48:13 -04:00
Tim Edwards 07788e7501 Update at Sun Jun 18 22:48:11 EDT 2017 by tim 2017-06-18 22:48:11 -04:00
Tim Edwards 24cc7d0c94 Update to add "property parallel none" command option. 2017-06-18 22:47:51 -04:00
Tim Edwards dbcd36d3ec Merge branch 'master' into work 2017-05-15 16:31:03 -04:00
Tim Edwards 25c17abb70 Update at Mon May 15 16:31:00 EDT 2017 by tim 2017-05-15 16:31:00 -04:00
Tim Edwards fd019b4afd Corrected the same error as a few commits back that causes a message
about property errors to show up, not due to property errors, but
due to proxy pins being inserted in the middle of a device record.
However, the first one was fixed for the case of proxy pins being
added to circuit 1, but the same fix was not made for the opposite
case of proxy pins being added to circuit 2.  This commit corrects
that omission.
2017-05-15 16:29:12 -04:00
5 changed files with 30 additions and 5 deletions
+1 -1
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@@ -1 +1 @@
1.5.78
1.5.80
+9 -2
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@@ -6661,8 +6661,15 @@ int MatchPins(struct nlist *tc1, struct nlist *tc2, int dolist)
obn->model.port = (i - j);
obn->instance.name = NULL;
obn->node = -1;
obn->next = ob2->next;
ob2->next = obn;
if (ob2 == tc2->cell) {
obn->next = ob2;
tc2->cell = obn;
}
else {
obn->next = ob2->next;
ob2->next = obn;
}
ob2 = obn;
hasproxy2 = 1;
+2 -1
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@@ -49,6 +49,7 @@ int NextNode;
int Composition = NONE;
int QuickSearch = 0;
int GlobalParallelNone = FALSE;
int AddToExistingDefinition = 0; /* default: overwrite cell when reopened */
@@ -1192,7 +1193,7 @@ void CellDef(char *name, int fnum)
np = InstallInCellHashTable(name, fnum);
CurrentCell = LookupCellFile(name, fnum);
CurrentCell->class = CLASS_SUBCKT; /* default */
CurrentCell->flags = 0;
CurrentCell->flags = (GlobalParallelNone) ? COMB_NO_PARALLEL : 0;
LastPlaced = NULL;
CurrentTail = NULL;
+1
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@@ -132,6 +132,7 @@ extern int IgnoreRC; /* set this to 1 to ignore capacitance and resistance */
extern int NoOutput; /* set this to 1 to disable stdout output */
extern int Composition; /* direction of composition */
extern int UnixWildcards; /* TRUE if *,?,{},[] only; false if full REGEXP */
extern int GlobalParallelNone; /* If TRUE, don't parallel combine any cells */
/* magic internal flag to restrict searches to recently placed cells */
extern int QuickSearch;
/* does re"CellDef"ing a cell add to it or overwrite it??? */
+17 -1
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@@ -3093,8 +3093,12 @@ _netcmp_equate(ClientData clientData,
/* netgen::property <device>|<model> <option> */
/* yes|no */
/* Where <option> is one of: */
/* serial --- allow/prohibit serial combination */
/* serial --- allow/prohibit serial combination */
/* parallel --- allow/prohibit parallel combination */
/* or */
/* netgen::property parallel none */
/* --- prohibit parallel combinations by */
/* default. */
/* */
/* Formerly: (none) */
/* Results: */
@@ -3188,6 +3192,18 @@ _netcmp_property(ClientData clientData,
}
return TCL_OK;
}
else if ((objc == 3) && (!strcmp(Tcl_GetString(objv[1]), "parallel"))) {
if (!strcmp(Tcl_GetString(objv[2]), "none"))
GlobalParallelNone = TRUE;
else if (!strcmp(Tcl_GetString(objv[2]), "all"))
GlobalParallelNone = FALSE;
else {
Tcl_SetResult(interp, "Bad option, should be property parallel none|all",
NONE);
return TCL_ERROR;
}
return TCL_OK;
}
result = CommonParseCell(interp, objv[1], &tp, &fnum);
if (result != TCL_OK) return result;