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78 Commits
Author SHA1 Message Date
Tim Edwards f0eec657a3 Update at Wed Aug 9 09:04:43 EDT 2017 by tim 2017-08-09 09:04:43 -04:00
Tim Edwards 9d476bc25a Merge branch 'master' into work 2017-06-22 08:13:02 -04:00
Tim Edwards 5ed3fcb3f1 Update at Thu Jun 22 08:12:59 EDT 2017 by tim 2017-06-22 08:13:00 -04:00
Tim Edwards ab9659af17 Corrected coding error in tilde expansion of .include filenames. 2017-06-22 08:12:41 -04:00
Tim Edwards 41939adb84 Merge branch 'master' into work 2017-06-20 22:55:26 -04:00
Tim Edwards 39573981be Update at Tue Jun 20 22:55:24 EDT 2017 by tim 2017-06-20 22:55:24 -04:00
Tim Edwards b9e26f6fce Implemented better black-box handling. Netlist with "stub" entries
for subcircuits (.subckt ... .ends pair with cellname and pin names
and pin order, but no contents) are automatically treated as black-
box circuits if found and if the "-blackbox" option is passed to the
"lvs" (scripted) command.  The "equate pins" command can be used
outside of a comparison to force two circuits (black-box or
otherwise) to be matched by pin name (if not a black-box circuit,
then this is a provisional name match, as a circuit comparison will
order based on connectivity first, not pin names).  So two sets of
black-box circuit libraries can be used as long as their pin names
match.  One hack added to ignore the "!" at the end of global names
when comparing pin names for matching.  Otherwise, pin names must
compare by case-insensitive string match.
2017-06-20 22:50:31 -04:00
Tim Edwards 78779ce2e9 Corrected the "property parallel none" command option so that it
gets applied properly to all existing cells (as well as all
future cells, but normally the former is applicable in a setup
file for LVS).
2017-06-19 22:22:08 -04:00
Tim Edwards 70bb33cc62 Finally reworked "cells" command behavior into something
consistent.
2017-06-19 21:04:33 -04:00
Tim Edwards fdf2f32654 Fixed the "cells -all" command so that it now matches the
documentation, and behaves as intended, which is that "-all" is
not a standalone option but is itself an optional qualifier to
the "cells <valid_cellname>" command.  So the options are
"cells <valid_cellname>" and "cells -all <valid_cellname>".
2017-06-19 20:22:59 -04:00
Tim Edwards 05d4225e97 New command option "model blackbox on|off" makes "readnet spice"
treat empty subcircuits as blackbox cells automatically without
requiring specific callse to "model <cell> blackbox" for each.
Enabled in LVS script by giving option "-blackbox" at the end
of the LVS command.
2017-06-19 17:41:31 -04:00
Tim Edwards b6218699a9 Merge branch 'master' into work 2017-06-19 12:39:02 -04:00
Tim Edwards d7927ef547 Update at Mon Jun 19 12:39:00 EDT 2017 by tim 2017-06-19 12:39:00 -04:00
Tim Edwards af7bc39bbf Added tilde expansion handling for .INCLUDE statements to the
SPICE netlist read routine.
2017-06-19 12:38:27 -04:00
Tim Edwards 5cd68b9ef1 Merge branch 'master' into work 2017-06-18 22:48:13 -04:00
Tim Edwards 07788e7501 Update at Sun Jun 18 22:48:11 EDT 2017 by tim 2017-06-18 22:48:11 -04:00
Tim Edwards 24cc7d0c94 Update to add "property parallel none" command option. 2017-06-18 22:47:51 -04:00
Tim Edwards dbcd36d3ec Merge branch 'master' into work 2017-05-15 16:31:03 -04:00
Tim Edwards 25c17abb70 Update at Mon May 15 16:31:00 EDT 2017 by tim 2017-05-15 16:31:00 -04:00
Tim Edwards fd019b4afd Corrected the same error as a few commits back that causes a message
about property errors to show up, not due to property errors, but
due to proxy pins being inserted in the middle of a device record.
However, the first one was fixed for the case of proxy pins being
added to circuit 1, but the same fix was not made for the opposite
case of proxy pins being added to circuit 2.  This commit corrects
that omission.
2017-05-15 16:29:12 -04:00
Tim Edwards cdfd74bac4 Removed old comment from code referring to the development state. 2017-05-08 21:00:43 -04:00
Tim Edwards dd9e02c5f3 Merge branch 'master' into work 2017-05-08 20:57:01 -04:00
Tim Edwards 26cd16f3ff Update at Mon May 8 20:56:58 EDT 2017 by tim 2017-05-08 20:56:58 -04:00
Tim Edwards ccdd47bc0b Corrected rare case where a cell that is flattened is the first
instance in a cell, and is empty, and causes the cell contents
to be nulled out.
2017-05-08 20:55:58 -04:00
Tim Edwards ace1c28507 Corrected an error placing proxy pins after the first pin of the
first object if the (presumably top-level) cell has no pins
(top-level cells not in a subcircuit definition satisfy this
condition).
2017-05-05 21:08:09 -04:00
Tim Edwards 5e9635e05f Merge branch 'master' into work 2017-05-05 17:36:32 -04:00
Tim Edwards 5c168946e3 Update at Fri May 5 17:36:29 EDT 2017 by tim 2017-05-05 17:36:29 -04:00
Tim Edwards 1471f0c09f Corrected error in combining property records of serial devices. 2017-05-05 17:35:57 -04:00
Tim Edwards 73b81fcfe3 Merge branch 'master' into work 2017-04-25 08:47:58 -04:00
Tim Edwards b083a6df7c Update at Tue Apr 25 08:47:57 EDT 2017 by tim 2017-04-25 08:47:57 -04:00
Tim Edwards 2b5a96500c Corrected the .gitignore file, which was apparently missed when
version 1.5 was first created in git.
2017-04-25 08:47:33 -04:00
Tim Edwards 66f94b47e6 Merge branch 'master' into work 2017-03-06 14:01:26 -05:00
Tim Edwards 09532ee628 Update at Mon Mar 6 14:01:25 EST 2017 by tim 2017-03-06 14:01:25 -05:00
Tim Edwards 2b7d416a41 A few corrections to the JSON format output. 2017-03-06 14:01:14 -05:00
Tim Edwards 090e9e122a Merge branch 'master' into work 2017-03-03 09:11:54 -05:00
Tim Edwards 67f1c1a2e9 Update at Fri Mar 3 09:11:52 EST 2017 by tim 2017-03-03 09:11:52 -05:00
Tim Edwards a7dcb4ef45 Corrected new JSON file output format from netgen. 2017-03-03 09:11:30 -05:00
Tim Edwards a0f1b4cc92 Merge branch 'master' into work 2017-02-27 09:36:54 -05:00
Tim Edwards b5d5496e40 Update at Mon Feb 27 09:36:52 EST 2017 by tim 2017-02-27 09:36:52 -05:00
Tim Edwards 7cac67c81b Corrected an error in the property match subroutine that was failing
to stop at the end of an instance record without properties, leading
to strange errors where netgen declares "There were property errors"
but does not print any errors (because there aren't any).
2017-02-27 09:35:18 -05:00
Tim Edwards ede7406b08 Merge branch 'master' into work 2017-02-08 15:17:01 -05:00
Tim Edwards 516d1c33fb Update at Wed Feb 8 15:16:59 EST 2017 by tim 2017-02-08 15:16:59 -05:00
Tim Edwards 0ad5730701 Corrected an error where snprintf() was not used when printing
formatted side-by-side output, causing a crash for names that
exceed the 40-column limit.
2017-02-08 15:16:24 -05:00
Tim Edwards 24d98ff0d3 Removed backup file for netgen.tcl.in, and made corrections for
the output JSON format, which was incorrect when some entries
were empty.
2017-01-09 17:06:23 -05:00
Tim Edwards 092c99dc1b Merge branch 'master' into work 2017-01-09 12:53:00 -05:00
Tim Edwards 4659b0795d Update at Mon Jan 9 12:52:59 EST 2017 by tim 2017-01-09 12:52:59 -05:00
Tim Edwards b1924bff65 Finished implementing the Tcl list output format, and added a
routine to convert the list output format to a JSON output file,
for easy readback, parsing, and display using python.
2017-01-09 12:51:31 -05:00
Tim Edwards bd356553fd Merge branch 'master' into work 2017-01-07 06:57:27 -05:00
Tim Edwards 46458f2836 Update at Sat Jan 7 06:57:25 EST 2017 by tim 2017-01-07 06:57:25 -05:00
Tim Edwards 8deccaad9c Fixed a bug in the combine routine that causes a segfault; added
preliminary support for a Tcl list output format.
2017-01-07 06:56:51 -05:00
Tim Edwards 4f24915661 Correction to device property matching code to fix a problem that
caused LVS(A, B) to give different results for property errors
than LVS(B, A).
2016-12-12 13:31:56 -05:00
Tim Edwards fdab366627 Corrected typo with == vs. = 2016-12-12 11:51:24 -05:00
Tim Edwards 310d7512a0 Removed backup file. 2016-12-12 11:32:52 -05:00
Tim Edwards 86f52b164a Merge branch 'master' into work 2016-12-12 11:32:44 -05:00
Tim Edwards 4a47c3076d Update at Mon Dec 12 11:32:42 EST 2016 by tim 2016-12-12 11:32:42 -05:00
Tim Edwards 777498b30e Completed the implementation of serial/parallel device network
matching.
2016-12-12 11:32:07 -05:00
Tim Edwards 8300531858 Fixed an error that prevented 'circuit1' and 'circuit2' from being
used in the general cell name format as advertised (in fact caused
a segfault), without which all setup file have to be very circuit-
specific.
2016-12-07 22:22:57 -05:00
Tim Edwards 80378d8816 Several errors in the serial combination code fixed, and then
the serial combination routine was disabled so as not to post a
non-working version, since the parallel/serial property networks
are not analyzed.  This should be completed soon.
2016-12-07 21:21:15 -05:00
Tim Edwards 80d981a672 Merge branch 'master' into work 2016-12-07 15:01:56 -05:00
Tim Edwards 809a3c16e9 Update at Wed Dec 7 15:01:55 EST 2016 by tim 2016-12-07 15:01:55 -05:00
Tim Edwards 8d976e5686 Added more handling of serial/parallel device networks, including
making any subcircuit serializable by using the new command option
"property (device) serial|parallel enable|disable".  Note that as
of this commit, serial device detection is enabled but serial
networks are not collapsed for matching, which will tend to lead
to property errors in serial devices until this code is added,
which should be in a day or two.
2016-12-07 14:57:43 -05:00
Tim Edwards 577dfb5a28 Merge branch 'master' into work 2016-11-11 09:52:19 -05:00
Tim Edwards 46252ad6b9 Update at Fri Nov 11 09:52:18 EST 2016 by tim 2016-11-11 09:52:18 -05:00
Tim Edwards 564fab9667 Corrected an error in which property types were not promoted if
an instance property did not match the cell property type, as
long as the cell property types of the two compared cells matched.
Along with a recent change that left "M" as a type double during
SPICE netlist read-in, this caused "M" mismatches to be ignored,
because the double value was ignored and the integer value was
always zero.
2016-11-11 09:49:37 -05:00
Tim Edwards 0df4190e19 Merge branch 'master' into work 2016-10-26 21:21:10 -04:00
Tim Edwards 2f661ea256 Update at Wed Oct 26 21:21:09 EDT 2016 by tim 2016-10-26 21:21:10 -04:00
Tim Edwards fca075e1ed Disabled the newest unfinished experimental code, which was not
supposed to have been pushed to git yet.
2016-10-26 21:20:42 -04:00
Tim Edwards cc2a5e0ee6 Merge branch 'master' into work 2016-10-25 11:29:17 -04:00
Tim Edwards b7a8d3cfda Update at Tue Oct 25 11:29:17 EDT 2016 by tim 2016-10-25 11:29:17 -04:00
Tim Edwards 0205902baa Changed behavior of property mismatch reporting. This is to help
avoid the problem where non-critical properties cause devices not
to match, resulting in apparent mismatches of matched devices.
The current behavior now prints a statement about each device.
However, the result is still somewhat ambiguous.
2016-10-25 11:26:45 -04:00
Tim Edwards 646b351ee5 Merge branch 'master' into work 2016-10-24 13:43:30 -04:00
Tim Edwards 31a0f10602 Update at Mon Oct 24 13:43:29 EDT 2016 by tim 2016-10-24 13:43:29 -04:00
Tim Edwards a2b1f5c85f Removed all instances of macro INLINE, as this is showing up now
as failing on certain compilers.  This undoubtedly reflects some
change in gcc or the OS setup, but since modern compilers should
be able to figure out for themselves when to inline a subroutine
(or not), the inline hint is somewhat arcane and unnecessary.
2016-10-24 13:42:08 -04:00
Tim Edwards 9148edde69 Implemented command option 'ignore shorted', same syntax as
'ignore class', but removes instances of the specified class whose
pins are shorted together.  Currently requires that all pins must
be shorted together.
2016-10-18 14:17:57 -04:00
Tim Edwards bb07a84ae1 Corrected error that fails to remove property records of any
instance that is deleted because it has been ignored with the
'ignore' command.
2016-10-18 10:19:49 -04:00
Tim Edwards d753e2c208 Merge branch 'master' into work 2016-10-18 09:59:37 -04:00
Tim Edwards bd3b88de4a Update at Tue Oct 18 09:59:36 EDT 2016 by tim 2016-10-18 09:59:36 -04:00
Tim Edwards 668aa38340 Corrected error in property matching, especially to handle problems
with missing properties in instances that prevent matching (underlines
need to add the code to apply defaults from the object where these
occur).
2016-10-18 09:58:00 -04:00
23 changed files with 9791 additions and 550 deletions
+11 -10
View File
@@ -1,12 +1,13 @@
*.*%
*.cdslck
.inca.db.*
inca.*.pak
*.swp
*.log
netgen
netgenexec
defs.mak
Depend
config.cache
config.log
config.status
*.o
*.so
*~
*/av_extracted*/
.nfs*
*.cd-
*/mommdl/
*.log
UPDATE_ME
VERSION
+6 -5
View File
@@ -1,15 +1,14 @@
TO_DO list for version 1.5
------------------------------
1) Parallel (transistors and capacitors) and serial (resistors)
device merging, plus methods for describing how any device
class may be merged.
As of version 1.5.70, the major to-do item list is complete.
Possible useful additions (not critical)
----------------------
1) Add new output style allowing netlists to be described by Tcl scripts
(similar to the C-Code format, but does not require compiling).
(similar to the C-Code format, but does not require compiling) (this
was done in 1.5.72, but now needs some scripts to make use of it.)
2) Add automatic file format guessing from file extension for "write" command
3) Add Tk GUI to match (and improve upon!) the original X11 GUI.
4) Incorporate into Tcl-based xcircuit
@@ -33,5 +32,7 @@ Possible useful additions (not critical)
ntk and ext formats, SPICE format writing, and sim format reading).
11) Add a "property" command to add/remove properties to check, and change
the slop values (done).
12) Add a "subcircuit" command to mimic a SPICE ".SUBCKT ... .ENDS" card.
12) Add a "subcircuit" command to mimic a SPICE ".SUBCKT ... .ENDS" card
(i.e., the ability to add subcircuit "stub" definitions from the
command line or from a setup file).
+1 -1
View File
@@ -1 +1 @@
1.5.62
1.5.84
-1
View File
@@ -20,7 +20,6 @@ int MaxCPUTime = 100; /* max number of seconds to burn */
#define MAX_CHANGES_PER_ITER 2
#if 0
/* INLINE */
float RandomUniform(void)
{
/* DANGER! DANGER! Non-portable code below!! */
-4
View File
@@ -36,7 +36,6 @@ int CountFanoutOK;
int CountSwallowedElements;
INLINE
int Independent(int E1, int E2)
/* return 1 if E1 and E2 share no leaves in common */
{
@@ -47,7 +46,6 @@ int Independent(int E1, int E2)
return(1);
}
INLINE
int FanoutOK(int E1, int E2)
{
int approxfanout;
@@ -67,7 +65,6 @@ int FanoutOK(int E1, int E2)
}
INLINE
int Swallowed(int Parent, int Child)
/* returns 1 if Child's fanout is contained in Parent's */
{
@@ -107,7 +104,6 @@ int SmallEnough(int E1, int E2)
}
#endif
INLINE
int SuccessfulEmbedding(int E)
/* returns 1 if element E is a successful embedding */
{
-9
View File
@@ -117,15 +117,6 @@
#define memzero(ptr, len) memset(ptr, 0, len)
#endif
#ifndef INLINE
#ifdef __GNUC__
#define INLINE inline
#else
#define INLINE
#endif /* __GNUC__ */
#endif
#ifdef HAVE_SYSV_STRING
#undef NEED_STRING
#endif
-3
View File
@@ -348,7 +348,6 @@ void PRINTPACKED(unsigned long *mstar)
#ifdef IBMPC
static unsigned int lochash(unsigned long *mstar)
#else
INLINE
static unsigned long lochash(unsigned long *mstar)
#endif
{
@@ -432,7 +431,6 @@ static struct ex_entry *hashinstall(unsigned long *mstar)
return(ex_tab[hashval] = np);
}
/* INLINE */
int Exists(int E1, int E2)
{
int i;
@@ -470,7 +468,6 @@ int InitializeExistTest(void)
return(1);
}
/* INLINE */
void AddToExistSet(int E1, int E2)
{
int i;
+2 -2
View File
@@ -170,7 +170,7 @@ char *ReadExt(char *fname, int doflat, int *fnum)
SetExtension(name, fname, EXT_EXTENSION);
if ((filenum = OpenParseFile(name, *fnum)) < 0) {
Printf("No file: %s\n",name);
Printf("Error in ext file read: No file %s\n",name);
*fnum = filenum;
return NULL;
}
@@ -643,7 +643,7 @@ char *ReadSim(char *fname, int *fnum)
SetExtension(name, fname, SIM_EXTENSION);
if (OpenParseFile(name, *fnum) < 0) {
Printf("No file: %s\n",name);
Printf("Error in ext file read: No file %s\n",name);
*fnum = filenum;
return NULL;
}
+25 -15
View File
@@ -486,24 +486,30 @@ int flattenInstancesOf(char *name, int fnum, char *instance)
}
/* splice instance out of parent */
if (ParentParams == ThisCell->cell) {
/* ParentParams are the very first thing in the list */
ThisCell->cell = ChildObjList;
for (ob2 = ChildObjList; ob2 && ob2->next != NULL; ob2 = ob2->next) ;
if ((ParentParams == ThisCell->cell) && (ChildObjList == NULL)) {
ThisCell->cell = ob2; /* Child cell was empty */
tmp = ob2;
}
else {
/* find ParentParams in ThisCell list */
for (ob2 = ThisCell->cell; ob2 && ob2->next != ParentParams; ob2=ob2->next);
if (ob2)
for (ob2->next = ChildObjList; ob2->next != NULL; ob2 = ob2->next) ;
}
/* now, ob2 is last element in child list, so skip and reclaim parent */
if (ParentParams == ThisCell->cell) {
/* ParentParams are the very first thing in the list */
ThisCell->cell = ChildObjList;
for (ob2 = ChildObjList; ob2 && ob2->next != NULL; ob2 = ob2->next) ;
}
else {
/* find ParentParams in ThisCell list */
for (ob2 = ThisCell->cell; ob2 && ob2->next != ParentParams; ob2=ob2->next);
if (ob2)
for (ob2->next = ChildObjList; ob2->next != NULL; ob2 = ob2->next) ;
}
/* now, ob2 is last element in child list, so skip and reclaim parent */
tmp = ParentParams;
do {
tmp = tmp->next;
} while ((tmp != NULL) && ((tmp->type > FIRSTPIN) || (tmp->type == PROPERTY)));
if (ob2) ob2->next = tmp;
tmp = ParentParams;
do {
tmp = tmp->next;
} while ((tmp != NULL) && ((tmp->type > FIRSTPIN) || (tmp->type == PROPERTY)));
if (ob2) ob2->next = tmp;
}
while (ParentParams != tmp) {
ob2 = ParentParams->next;
FreeObjectAndHash(ParentParams, ThisCell);
@@ -1224,6 +1230,10 @@ int CleanupPins(char *name, int filenum)
return 0;
}
// If cell is type MODULE, this is a black-box circuit and
// pins are expected to be disconnected (so don't remove them).
if (ThisCell->class == CLASS_MODULE) return 0;
// Avoid a loop through all cells unless we have to do it.
for (ob = ThisCell->cell; ob != NULL; ob = ob->next) {
+1821 -325
View File
File diff suppressed because it is too large Load Diff
+6423
View File
File diff suppressed because it is too large Load Diff
+10 -4
View File
@@ -9,6 +9,7 @@ extern struct nlist *Circuit2;
extern int ExhaustiveSubdivision;
#ifdef TCL_NETGEN
#include <tcl.h>
extern int InterruptPending;
#endif
@@ -17,10 +18,11 @@ extern int InterruptPending;
extern void PrintElementClasses(struct ElementClass *EC, int type, int dolist);
extern void PrintNodeClasses(struct NodeClass *NC, int type, int dolist);
extern void SummarizeNodeClasses(struct NodeClass *NC);
extern void PrintPropertyResults(void);
extern void PrintPropertyResults(int do_list);
extern void PrintCoreStats(void);
extern void ResetState(void);
extern void CreateTwoLists(char *name1, int file1, char *name2, int file2);
extern void CreateTwoLists(char *name1, int file1, char *name2, int file2,
int dolist);
extern int Iterate(void);
extern int VerifyMatching(void);
extern void PrintAutomorphisms(void);
@@ -32,8 +34,9 @@ extern int PermuteForget(char *model, int filenum, char *pin1, char *pin2);
extern int EquivalenceElements(char *name1, int file1, char *name2, int file2);
extern int EquivalenceNodes(char *name1, int file1, char *name2, int file2);
extern int EquivalenceClasses(char *name1, int file1, char *name2, int file2);
extern int IgnoreClass(char *name, int file);
extern int MatchPins(struct nlist *tp1, struct nlist *tp2);
extern int IgnoreClass(char *name, int file, unsigned char type);
extern int MatchPins(struct nlist *tp1, struct nlist *tp2, int dolist);
extern int PropertyOptimize(struct objlist *ob, struct nlist *tp, int run, int serial);
extern int CreateCompareQueue(char *, int, char *, int);
extern int GetCompareQueueTop(char **, int *, char **, int *);
@@ -50,5 +53,8 @@ extern int EquivalentElement();
extern void enable_interrupt();
extern void disable_interrupt();
extern Tcl_Obj *ListNodeClasses(int legal);
extern Tcl_Obj *ListElementClasses(int legal);
#endif
+5 -5
View File
@@ -77,8 +77,9 @@ extern char *SetExtension(char *buffer, char *path, char *extension)
strcat(tmpbuf, extension);
/* step 4: lower-case the entire name */
for (pt = tmpbuf; *pt != '\0'; pt++)
if (isupper(*pt)) *pt = tolower(*pt);
/* (Commented out because this is really stupid.) */
// for (pt = tmpbuf; *pt != '\0'; pt++)
// if (isupper(*pt)) *pt = tolower(*pt);
if (buffer != NULL) {
strcpy(buffer, tmpbuf);
@@ -567,7 +568,7 @@ char *ReadNetgenFile (char *fname, int *fnum)
if ((filenum = OpenParseFile(fname, *fnum)) < 0) {
SetExtension(name, fname, NETGEN_EXTENSION);
if ((filenum = OpenParseFile(name, *fnum)) < 0) {
Printf("No file: %s\n",name);
Printf("Error in netgen read: No file %s\n",name);
*fnum = -1;
return NULL;
}
@@ -730,7 +731,6 @@ char *readbuf;
int bytes_in_buffer;
char *bufptr;
INLINE
int READ(void *buf, int bytes)
{
if (bytes_in_buffer >= bytes) {
@@ -804,7 +804,7 @@ char *ReadNetgenFile (char *fname, int *fnum)
if ((File = open(fname, O_RDONLY, FILE_ACCESS_BITS)) == -1) {
SetExtension(name, fname, NETGEN_EXTENSION);
if ((File = open(name, O_RDONLY, FILE_ACCESS_BITS)) == -1) {
Printf("No file: %s\n",name);
Printf("Error in netgen read: No file %s\n",name);
return NULL;
}
}
+596 -67
View File
@@ -49,6 +49,7 @@ int NextNode;
int Composition = NONE;
int QuickSearch = 0;
int GlobalParallelNone = FALSE;
int AddToExistingDefinition = 0; /* default: overwrite cell when reopened */
@@ -870,6 +871,32 @@ int ReduceExpressions(struct objlist *instprop, struct objlist *parprops,
return 0;
}
/*----------------------------------------------------------------------*/
/* Set/clear the flag bit COMB_NO_PARALLEL on all cells. Note that the */
/* function is called with value for enabling combine parallel, so */
/* value TRUE means clear bit, value FALSE means set bit. */
/*----------------------------------------------------------------------*/
struct nlist *SetParallelCombineFlag(struct hashlist *p, void *clientdata)
{
struct nlist *ptr;
int *value = (int *)clientdata;
ptr = (struct nlist *)(p->ptr);
if (*value == TRUE)
ptr->flags &= (~COMB_NO_PARALLEL);
else
ptr->flags |= COMB_NO_PARALLEL;
return NULL; /* NULL keeps search alive */
}
void SetParallelCombine(int value)
{
ClearDumpedList();
RecurseCellHashTable2(SetParallelCombineFlag, (void *)(&value));
}
/*----------------------------------------------------------------------*/
/* Delete a property from the master cell record. */
/*----------------------------------------------------------------------*/
@@ -948,10 +975,10 @@ PropertyTolerance(char *name, int fnum, char *key, int ival, double dval)
switch (kl->type) {
case PROP_DOUBLE:
case PROP_VALUE:
case PROP_STRING:
kl->slop.dval = dval;
break;
case PROP_INTEGER:
case PROP_STRING:
case PROP_EXPRESSION:
kl->slop.ival = ival;
break;
@@ -1103,15 +1130,15 @@ struct property *PropertyInteger(char *name, int fnum, char *key,
/*----------------------------------------------------------------------*/
struct property *PropertyString(char *name, int fnum, char *key, int range,
struct property *PropertyString(char *name, int fnum, char *key, double dval,
char *pdefault)
{
struct property *kl = NULL;
struct nlist *tc;
if ((fnum == -1) && (Circuit1 != NULL) && (Circuit2 != NULL)) {
PropertyString(name, Circuit1->file, key, range, pdefault);
PropertyString(name, Circuit2->file, key, range, pdefault);
PropertyString(name, Circuit1->file, key, dval, pdefault);
PropertyString(name, Circuit2->file, key, dval, pdefault);
return;
}
@@ -1127,7 +1154,7 @@ struct property *PropertyString(char *name, int fnum, char *key, int range,
kl->idx = 0;
kl->merge = MERGE_NONE;
kl->type = PROP_STRING;
kl->slop.ival = (range >= 0) ? range : 0;
kl->slop.dval = dval;
if (pdefault != NULL)
kl->pdefault.string = strsave(pdefault);
else
@@ -1192,7 +1219,7 @@ void CellDef(char *name, int fnum)
np = InstallInCellHashTable(name, fnum);
CurrentCell = LookupCellFile(name, fnum);
CurrentCell->class = CLASS_SUBCKT; /* default */
CurrentCell->flags = 0;
CurrentCell->flags = (GlobalParallelNone) ? COMB_NO_PARALLEL : 0;
LastPlaced = NULL;
CurrentTail = NULL;
@@ -1212,6 +1239,10 @@ void CellDefNoCase(char *name, int file)
CurrentCell->flags |= CELL_NOCASE;
}
/*----------------------------------------------------------------------*/
/* Return 0 if class 'name' is not being ignored (per the 'ignore' */
/* command); 1 if it is ignored, and 2 if shorted instances should be */
/* ignored. */
/*----------------------------------------------------------------------*/
int IsIgnored(char *name, int file)
@@ -1223,7 +1254,7 @@ int IsIgnored(char *name, int file)
{
if ((file == -1) || (ilist->file == -1) || (file == ilist->file))
if ((*matchfunc)(ilist->class, nptr))
return 1;
return ilist->type; /* IGNORE_CLASS or IGNORE_SHORTED */
}
return 0;
}
@@ -1361,10 +1392,6 @@ void Instance(char *model, char *instancename)
return;
}
fnum = CurrentCell->file;
if (IsIgnored(model, fnum)) {
Printf("Class '%s' instanced in input but is being ignored.\n", model);
return;
}
instanced_cell = LookupCellFile(model, fnum);
if (instanced_cell == NULL) {
Printf("Attempt to instance undefined model '%s'\n", model);
@@ -1504,7 +1531,7 @@ char *Cell(char *inststr, char *model, ...)
struct objlist *namedporthead, *namedportp, *namedlisthead, *namedlistp;
int portnum, portlist, done;
char namedport[512]; /* tmp buffers */
int filenum;
int filenum, itype, samenode;
static char *instancename = NULL;
char *instnameptr;
@@ -1517,7 +1544,7 @@ char *Cell(char *inststr, char *model, ...)
filenum = CurrentCell->file;
if (Debug) Printf(" calling cell: %s\n",model);
if (IsIgnored(model, filenum)) {
if ((itype = IsIgnored(model, filenum)) == IGNORE_CLASS) {
Printf("Class '%s' instanced in input but is being ignored.\n", model);
return NULL;
}
@@ -1600,6 +1627,21 @@ char *Cell(char *inststr, char *model, ...)
}
va_end(ap);
/* Check for shorted pins */
if ((itype == IGNORE_SHORTED) && (head != NULL)) {
unsigned char shorted = (unsigned char)1;
for (tp = head->next; tp; tp = tp->next) {
if (strcasecmp(head->name, tp->name))
shorted = (unsigned char)0;
break;
}
if (shorted == (unsigned char)1) {
Printf("Instance of '%s' is shorted, ignoring.\n", model);
FreeObject(head);
return NULL;
}
}
if (inststr == NULL) {
if (instancename != NULL)
FreeString(instancename);
@@ -1992,7 +2034,7 @@ struct objlist *LinkProperties(char *model, struct keyvalue *topptr)
else
filenum = CurrentCell->file;
if (IsIgnored(model, filenum)) {
if (IsIgnored(model, filenum) == IGNORE_CLASS) {
Printf("Class '%s' instanced in input but is being ignored.\n", model);
return NULL;
}
@@ -2039,7 +2081,7 @@ struct objlist *LinkProperties(char *model, struct keyvalue *topptr)
kl->idx = 0;
kl->merge = MERGE_NONE;
kl->type = PROP_STRING;
kl->slop.ival = 0;
kl->slop.dval = 0.0;
kl->pdefault.string = NULL;
HashPtrInstall(kl->key, kl, &(cell->propdict));
}
@@ -2303,7 +2345,7 @@ void ResolveProperties(char *name1, int file1, char *name2, int file2)
switch (kl1->type) {
case PROP_STRING:
kl2 = PropertyString(tp2->name, tp2->file, kl1->key,
kl1->slop.ival, kl1->pdefault.string);
kl1->slop.dval, kl1->pdefault.string);
break;
case PROP_INTEGER:
kl2 = PropertyInteger(tp2->name, tp2->file, kl1->key,
@@ -2335,7 +2377,7 @@ void ResolveProperties(char *name1, int file1, char *name2, int file2)
switch (kl2->type) {
case PROP_STRING:
kl1 = PropertyString(tp1->name, tp1->file, kl2->key,
kl2->slop.ival, kl2->pdefault.string);
kl2->slop.dval, kl2->pdefault.string);
break;
case PROP_INTEGER:
kl1 = PropertyInteger(tp1->name, tp1->file, kl2->key,
@@ -2834,6 +2876,157 @@ void ConnectAllNodes(char *model, int file)
if (ob->node == -1) ob->node = nodenum++;
}
/*----------------------------------------------------------------------*/
/* Serial and Parallel combination: */
/* All devices of the same type that exist in serial and parallel */
/* combinations will be treated as a single device in a network. */
/* Serial connections are only allowed for resistors and inductors. */
/* Any device may be connected in parallel. For combinations of serial */
/* and parallel, as in a resistor network, there is a set of rules: */
/* */
/* Running parallel and serial checks: */
/* 1. Run parallel once. If a repeat run and no devices are merged, */
/* then go to 4. */
/* 2. Run serial until no devices are merged. */
/* 3. If serial ran more than once, then go to 1. */
/* 4. End merge */
/* */
/* Each merge procedure, when it finds two devices that can be merged, */
/* removes the second device from the netlist and adds its properties */
/* to the first device. If a serial merge, then the nodes are adjusted */
/* appropriately. Where A is the property list of the first device and */
/* B is the property list of the second device, the first and last */
/* properties of A and the first property of B may require a marker to */
/* indicate the topology of the network, as follows (in order): */
/* */
/* For a parallel merge: */
/* 1) If A has serial components then tag first property of A with */
/* "open" and tag first property of B with "close". */
/* 2) If B has serial components then tag first property of B with */
/* "open". */
/* */
/* For a serial merge: */
/* 1) If A has unbalanced "opens", then add "close" to first */
/* property of B to balance the "opens". */
/* 2) Always tag B with "serial". */
/* */
/* Tags are indicated by a property named "_tag" which has a string */
/* value of ordered characters, "+" for serial, "(" for open, and ")" */
/* for close. A device with only one property record has no "_tag" */
/* record. A device which is in parallel with the device(s) in front */
/* of it is implicitly parallel by not having an "+" tag, and may not */
/* have a tag at all. */
/* */
/* The property check routine is responsible for comparing device */
/* serial/parallel networks against each other. Otherwise, each */
/* serial/parallel network is considered topologically as a single */
/* device, and any differences in the serial/parallel networks between */
/* two circuits being matched will be treated as a property error. */
/*----------------------------------------------------------------------*/
/* add_prop_tag --- add the tag character tagc to the property list of */
/* obr. obr points to the first property record. */
int add_prop_tag(struct objlist *obr, char tagc)
{
struct objlist *nob;
int i, k, l;
struct valuelist *kv, *kv2;
int hastag;
char *tmpstr;
hastag = FALSE;
for (nob = obr; nob->next && nob->next->type == PROPERTY; nob = nob->next) {
for (i = 0; ; i++) {
kv = &(nob->instance.props[i]);
if (kv->type == PROP_ENDLIST) break;
if (kv->type == PROP_STRING) {
if (!strcmp(kv->key, "_tag")) {
hastag = TRUE;
break;
}
}
}
}
if (hastag) {
if (nob == obr) {
// If _tag was first in the list, then just prepend tagc to the tag value
tmpstr = kv->value.string;
kv->value.string = (char *)MALLOC(strlen(tmpstr) + 2);
sprintf(kv->value.string, "%c%s", tagc, tmpstr);
FREE(tmpstr);
}
else {
// Add a _tag key to the first property list and set value to tagc
kv = &(obr->instance.props[i]);
k = 0;
for (k = 0; ; k++) {
kv = &(obr->instance.props[k]);
if (kv->type == PROP_ENDLIST)
break;
}
kv2 = (struct valuelist *)MALLOC((k + 2) * sizeof(struct valuelist));
kv2->key = strsave("_tag");
kv2->type = PROP_STRING;
/* Value is set to tagc */
kv2->value.string = (char *)MALLOC(2);
sprintf(kv2->value.string, "%c", tagc);
for (l = 0; l <= k; l++)
kv2[l + 1] = obr->instance.props[l];
FREE(obr->instance.props);
obr->instance.props = kv2;
}
}
return hastag;
}
/* add_balancing_close --- find the number of unbalanced 'open' */
/* records in ob1's property list, and prepend the correct number of */
/* 'C' closures to the property list of ob2. */
void add_balancing_close(struct objlist *ob1, struct objlist *ob2)
{
struct objlist *nob;
int i, k, l;
struct valuelist *kv, *kv2;
int opentags;
char *tmpstr, *tag;
/* Find the first property record in ob1. */
for (nob = ob1->next; nob && nob->type != FIRSTPIN; nob = nob->next)
if (nob->type == PROPERTY)
break;
if (nob->type != PROPERTY) return; // shouldn't happen
opentags = 0;
for (; nob->next && nob->next->type == PROPERTY; nob = nob->next) {
for (i = 0; ; i++) {
kv = &(nob->instance.props[i]);
if (kv->type == PROP_ENDLIST) break;
if (kv->type == PROP_STRING) {
if (!strcmp(kv->key, "_tag")) {
for (tag = kv->value.string; *tag != '\0'; tag++) {
if (*tag == '(') opentags++;
else if (*tag == ')') opentags--;
}
break;
}
}
}
}
if (opentags == 0) return;
/* Find the first property record in ob2. */
for (nob = ob2->next; nob && nob->type != FIRSTPIN; nob = nob->next)
if (nob->type == PROPERTY)
break;
if (nob->type != PROPERTY) return; // shouldn't happen
// This is slow but it's the easiest way to do it
while (opentags-- > 0) add_prop_tag(nob, ')');
}
/*----------------------------------------------------------------------*/
/* Find all devices that are of the same class and check for parallel */
/* combinations, and combine them where found, adjusting property "M" */
@@ -2850,23 +3043,26 @@ void ConnectAllNodes(char *model, int file)
/* */
/* If the device has permutable pins, then duplicate hashes are made */
/* for each permutation. */
/* */
/* Return the number of devices merged. */
/*----------------------------------------------------------------------*/
void CombineParallel(char *model, int file)
int CombineParallel(char *model, int file)
{
struct nlist *tp, *tsub;
struct objlist *ob, *ob2, *nextob;
struct objlist *sob, *lob, *tlob, *nob, *pob, *obr;
struct objlist *sob, *lob, *nob, *pob, *obr;
struct objlist *propfirst, *proplast, *spropfirst, *sproplast;
struct hashdict devdict;
struct Permutation *perm;
size_t pcnt;
int dcnt = 0;
int i, dcnt = 0, hastag;
char *pstr, *p2str, *pptr;
struct valuelist *kv;
if ((tp = LookupCellFile(model, file)) == NULL) {
Printf("Cell: %s does not exist.\n", model);
return;
return -1;
}
InitializeHashTable(&devdict, OBJHASHSIZE);
@@ -2875,12 +3071,21 @@ void CombineParallel(char *model, int file)
for (ob = tp->cell; ob; ) {
if (ob->type == FIRSTPIN) {
/* Watch for devices prohibited from parallel combination. */
/* All devices allow parallel combination by default. */
tsub = LookupCellFile(ob->model.class, file);
if ((tsub != NULL) && (tsub->flags & COMB_NO_PARALLEL)) {
lob = ob;
ob = ob->next;
continue;
}
/* ------------------------------------*/
/* Generate hash key from pins */
/* Handle pin permuations */
/* ------------------------------------*/
tsub = LookupCellFile(ob->model.class, file);
if ((tsub != NULL) && (tsub->permutes != NULL))
perm = tsub->permutes;
else
@@ -2888,14 +3093,17 @@ void CombineParallel(char *model, int file)
pcnt = strlen(ob->model.class) + 2;
pptr = (char *)pcnt;
propfirst = proplast = NULL;
for (ob2 = ob; ob2 && (ob2->type > FIRSTPIN || ob2 == ob); ob2 = ob2->next) {
tlob = ob2;
pob = ob2;
pcnt += 10;
}
if (ob2 && (ob2->type == PROPERTY)) propfirst = ob2;
/* Find last record in device and first record in next object */
while (ob2 && ob2->type == PROPERTY) {
tlob = ob2;
proplast = ob2;
ob2 = ob2->next;
}
nextob = ob2;
@@ -2952,70 +3160,391 @@ void CombineParallel(char *model, int file)
FREE((char *)p2str);
}
/* Set last object ptr to end of this record */
lob = tlob;
/* Move last object marker to end of sob record */
if (proplast != NULL)
lob = proplast;
else
lob = pob;
}
else {
/* Remove parallel device "ob" and append properties of */
/* Find parallel device "ob" and append properties of */
/* "sob" to it. If "ob" does not have properties, then */
/* create a property record and set property "M" to 2. */
for (obr = ob; obr != ob2 ; ) {
/* Find last non-property record of sob ( = pob) */
/* Find first property record of sob ( = spropfirst) */
/* Find last property record of sob ( = sproplast) */
spropfirst = sproplast = NULL;
for (ob2 = sob; ob2->type > FIRSTPIN || ob2 == sob; ob2 = ob2->next)
pob = ob2;
if (ob2->type == PROPERTY) spropfirst = ob2;
for (; ob2->type == PROPERTY; ob2 = ob2->next)
sproplast = ob2;
if (spropfirst == NULL) {
/* Create new property instance record if one doesn't exist */
nob = GetObject();
nob->type = PROPERTY;
nob->name = strsave("properties");
nob->node = -2; /* Don't report as disconnected node */
nob->model.class = strsave(sob->model.class);
nob->instance.props = NewPropValue(2);
/* Create property record for property "M" and set to 1 */
kv = &(nob->instance.props[0]);
kv->key = strsave("M");
kv->type = PROP_INTEGER;
kv->value.ival = 1;
/* End of property list */
kv = &(nob->instance.props[1]);
kv->key = NULL;
kv->type = PROP_ENDLIST;
kv->value.ival = 0;
nob->next = pob->next;
pob->next = nob;
if (lob == pob) lob = nob;
spropfirst = sproplast = nob;
}
if (propfirst == NULL) {
/* Create new property instance record if one doesn't exist */
nob = GetObject();
nob->type = PROPERTY;
nob->name = strsave("properties");
nob->node = -2; /* Don't report as disconnected node */
nob->model.class = strsave(ob->model.class);
nob->instance.props = NewPropValue(2);
/* Create property record for property "M" and set to 1 */
kv = &(nob->instance.props[0]);
kv->key = strsave("M");
kv->type = PROP_INTEGER;
kv->value.ival = 1;
/* End of property list */
kv = &(nob->instance.props[1]);
kv->key = NULL;
kv->type = PROP_ENDLIST;
kv->value.ival = 0;
/* Append to sob's property list */
nob->next = sproplast->next;
sproplast->next = nob;
if (lob == sproplast) lob = nob;
}
if (propfirst != NULL) {
// Serial/Parallel logic:
// If propfirst has _tag in properties,
// then add an "open" tag at propfirst
add_prop_tag(propfirst, '(');
// if spropfirst has _tag in properties then add an "open" tag
// to spropfirst and a "close" tag to propfirst
if (add_prop_tag(spropfirst, '(')) add_prop_tag(propfirst, ')');
/* Append ob's property list to sob */
proplast->next = sproplast->next;
sproplast->next = propfirst;
if (lob == sproplast) lob = proplast;
}
/* Link up around object to be removed */
lob->next = nextob;
/* Remove the object */
for (obr = ob; obr != propfirst && obr != nextob; ) {
nob = obr->next;
FreeObjectAndHash(obr, tp);
obr = nob;
}
dcnt++;
/* Find (first) property record of sob */
for (pob = sob->next; pob->type > FIRSTPIN; pob = pob->next) {
if (pob->next->type == PROPERTY)
break;
else if (pob->next->type == FIRSTPIN) {
/* Create new property instance record if one doesn't exist */
nob = GetObject();
nob->type = PROPERTY;
nob->name = strsave("properties");
nob->node = -2; /* Don't report as disconnected node */
nob->model.class = strsave(sob->model.class);
nob->instance.props = NewPropValue(2);
/* Create property record for property "M" and set to 1 */
kv = &(nob->instance.props[0]);
kv->key = strsave("M");
kv->type = PROP_INTEGER;
kv->value.ival = (obr->type != PROPERTY) ? 2 : 1;
/* End of property list */
kv = &(nob->instance.props[1]);
kv->key = NULL;
kv->type = PROP_ENDLIST;
kv->value.ival = 0;
nob->next = pob->next;
pob->next = nob;
break;
}
}
if (lob == pob) lob = tlob;
if (obr->type == PROPERTY) {
/* Pull out property records and append to sob's */
/* property list */
tlob->next = pob->next;
pob->next = obr;
}
lob->next = nextob;
}
FREE((char *)pstr);
}
else
else {
lob = ob;
nextob = ob->next;
}
ob = nextob;
}
HashKill(&devdict);
if (dcnt > 0) {
Fprintf(stdout, "Class %s: Merged %d devices.\n", model, dcnt);
}
return dcnt;
}
/*----------------------------------------------------------------------*/
/* For the purposes of serial connection checking, find if all pins */
/* of two instances after the first two pins are connected to the name */
/* nodes. This depends on the definition of a serial device as having */
/* two ports, but any additional ports (such as a substrate connection) */
/* must be the same for all devices in series. */
/*----------------------------------------------------------------------*/
int check_pin_nodes(struct objlist *ob1, struct objlist *ob2)
{
struct objlist *nob, *pob;
/* A dummy device may have both terminals connected to the same */
/* point, triggering a false check for a serial device. */
if (ob1 == ob2) return FALSE;
for (nob = ob1->next; nob && nob->type != FIRSTPIN; nob = nob->next)
if (nob->type == 3) break;
for (pob = ob2->next; pob && pob->type != FIRSTPIN; pob = pob->next)
if (pob->type == 3) break;
while (nob && pob && nob->type > FIRSTPIN && pob->type > FIRSTPIN) {
if (nob->node != pob->node)
return FALSE;
nob = nob->next;
pob = pob->next;
}
if (nob->type > FIRSTPIN || pob->type > FIRSTPIN) return FALSE;
return TRUE;
}
/*----------------------------------------------------------------------*/
/* Find all nodes that are connected to exactly two devices of the same */
/* class. Where found, if the device is allowed to combine serially */
/* (check properties), then remove the node and merge the devices into */
/* one. */
/* */
/* This routine depends on CombineParallel() being run first so that no */
/* parallel devices are reported as serial. */
/* */
/* Return the number of devices merged. */
/*----------------------------------------------------------------------*/
int CombineSerial(char *model, int file)
{
struct nlist *tp, *tp2;
struct objlist ***instlist;
struct objlist *ob, *ob2, *obs, *obp, *obn;
int i, j, scnt = 0;
struct valuelist *kv;
if ((tp = LookupCellFile(model, file)) == NULL) {
Printf("Cell: %s does not exist.\n", model);
return -1;
}
/* Diagnostic */
/* Printf("CombineSerial start model = %s file = %d\n", model, file); */
instlist = (struct objlist ***)CALLOC((tp->nodename_cache_maxnodenum + 1),
sizeof(struct objlist **));
for (ob = tp->cell; ob; ob = ob->next) {
if ((ob->type >= FIRSTPIN) && (ob->node >= 0)) {
if (ob->type == FIRSTPIN)
obp = ob; // Save pointer to first pin of device
if (instlist[ob->node] == NULL) {
/* Node has not been seen before, so add it to list */
instlist[ob->node] = (struct objlist **)CALLOC(2,
sizeof(struct objlist *));
/* Device must be marked as able to be combined in serial. */
/* Note that devices with more than two pins are expected */
/* to serial connect along the first two pins, and the */
/* remaining pins must all connect to the same nodes. By */
/* default, CLASS_RES, CLASS_RES3, and CLASS_INDUCTOR are */
/* all allowed to combine in serial. All other devices */
/* must have serial combination explicitly enabled. */
/* NOTE: Arbitrarily, the first two pins of a device are */
/* assumed to be the ones that make serial connections. */
/* Additional pins, if any, do not. */
tp2 = LookupCellFile(ob->model.class, file);
if ((tp2->flags & COMB_SERIAL) && (ob->type <= 2))
instlist[ob->node][0] = obp;
else
/* invalidate node */
instlist[ob->node][0] = NULL;
}
else if (instlist[ob->node][0] == NULL) {
/* Node is not valid for serial connection */
}
else if (instlist[ob->node][1] == NULL) {
/* Check if first instance is the same type */
if ((*matchfunc)(instlist[ob->node][0]->model.class, ob->model.class)) {
if (check_pin_nodes(instlist[ob->node][0], obp))
instlist[ob->node][1] = obp;
else
/* invalidate node */
instlist[ob->node][0] = NULL;
}
else
/* invalidate node */
instlist[ob->node][0] = NULL;
}
else {
/* More than two devices connect here, so invalidate */
instlist[ob->node][0] = NULL;
}
}
}
for (i = 0; i <= tp->nodename_cache_maxnodenum; i++) {
if (instlist[i] != NULL) {
if ((instlist[i][0] != NULL) && (instlist[i][1] != NULL)) {
int k, l;
struct valuelist *kv2;
/* Diagnostic */
/* Fprintf(stdout, "Found serial instances %s and %s\n",
instlist[i][0]->instance.name,
instlist[i][1]->instance.name); */
scnt++;
/* To maintain knowledge of the topology, 2nd device gets */
/* a parameter '_tag', string value set to "+". */
for (obn = instlist[i][1]; obn->next &&
obn->next->type > FIRSTPIN; obn = obn->next);
obp = obn->next;
if (obp == NULL || obp->type != PROPERTY) {
struct objlist *nob;
/* No property record, so insert one */
nob = GetObject();
nob->type = PROPERTY;
nob->name = strsave("properties");
nob->node = -2; /* Don't report as disconnected node */
nob->model.class = (obp->model.class == NULL) ? NULL :
strsave(obp->model.class);
nob->instance.props = NewPropValue(2);
/* Create property record for property "_tag" */
kv = &(nob->instance.props[0]);
kv->key = strsave("_tag");
kv->type = PROP_STRING;
/* Value is set to "+" */
kv->value.string = (char *)MALLOC(2);
sprintf(kv->value.string, "+");
/* End of property list */
kv = &(nob->instance.props[1]);
kv->key = NULL;
kv->type = PROP_ENDLIST;
kv->value.ival = 0;
nob->next = obp;
obn->next = nob;
}
else if (obp->type == PROPERTY) {
/* Add to properties */
k = 0;
for (k = 0; ; k++) {
kv = &(obp->instance.props[k]);
if (kv->type == PROP_ENDLIST) {
kv2 = (struct valuelist *)MALLOC((k + 2) *
sizeof(struct valuelist));
kv2->key = strsave("_tag");
kv2->type = PROP_STRING;
/* Value is set to "+" */
kv2->value.string = (char *)MALLOC(2);
sprintf(kv2->value.string, "+");
for (l = 0; l <= k; l++)
kv2[l + 1] = obp->instance.props[l];
FREE(obp->instance.props);
obp->instance.props = kv2;
break;
}
else if (!strcmp(kv->key, "_tag")) {
int l = strlen(kv->value.string);
char *newstr = (char *)MALLOC(l + 2);
sprintf(newstr, "S%s", kv->value.string);
FREE(kv->value.string);
kv->value.string = newstr;
break;
}
}
}
/* Combine these two instances and remove node i */
for (ob2 = instlist[i][0]; ob2; ob2 = ob2->next) {
if (ob2->node == i)
break;
}
for (obs = instlist[i][1]; obs; obs = obs->next) {
if (obs->node != i) {
ob2->node = obs->node;
break;
}
}
/* Excise the 2nd instance. instlist[i][1] remains as the */
/* only pointer to it. */
for (obp = instlist[i][0]; obp->next->type > FIRSTPIN ||
obp->next->type == PROPERTY; obp = obp->next);
for (ob2 = obp; ob2->next != instlist[i][1]; ob2 = ob2->next);
for (obs = ob2->next; obs->next && (obs->next->type > FIRSTPIN
|| obs->next->type == PROPERTY); obs = obs->next);
ob2->next = obs->next;
if (obs->next) obs->next = NULL; // Terminate 2nd instance record
/* If 1st device has unbalanced 'open' records, then add 'close' */
/* records to the 2nd device to balance. */
add_balancing_close(instlist[i][0], instlist[i][1]);
/* Move property record(s) of the 2nd device to the first */
for (obs = instlist[i][1]; obs && obs->type != PROPERTY; obs = obs->next);
while (obs && (obs->type == PROPERTY)) {
obn = obs->next;
obs->next = obp->next;
obp->next = obs;
obs = obn;
}
/* If 2nd device appears anywhere else in the serial device */
/* list, replace it with the 1st device. */
for (j = i + 1; j <= tp->nodename_cache_maxnodenum; j++) {
if (instlist[j] == NULL) continue;
if (instlist[j][0] == instlist[i][1])
instlist[j][0] = instlist[i][0];
if (instlist[j][1] == instlist[i][1])
instlist[j][1] = instlist[i][0];
/* If instlist[j]'s two entries point to the same device */
/* then invalidate it. */
if (instlist[j][0] == instlist[j][1]) {
FREE(instlist[j]);
instlist[j] = NULL;
}
}
/* Free 2nd device's object */
for (obs = instlist[i][1]; obs && obs->type != PROPERTY; ) {
obn = obs->next;
FreeObjectAndHash(obs, tp);
obs = obn;
}
/* Free node i and remove from object hash */
for (obp = tp->cell; obp->next; obp = obp->next) {
if ((obp->next->type == NODE) && (obp->next->node == i)) {
obn = obp->next;
obp->next = obp->next->next;
FreeObjectAndHash(obn, tp);
break;
}
}
}
FREE(instlist[i]);
}
}
FREE(instlist);
return scnt;
}
/*----------------------------------------------------------------------*/
+9 -4
View File
@@ -33,8 +33,9 @@ extern struct property *PropertyDouble(char *name, int fnum, char *key,
extern struct property *PropertyInteger(char *name, int fnum, char *key,
int slop, int pdefault);
extern struct property *PropertyString(char *name, int fnum, char *key,
int range, char *pdefault);
double slop, char *pdefault);
extern int PropertyDelete(char *name, int fnum, char *key);
extern void SetParallelCombine(int value);
extern int PropertyTolerance(char *name, int fnum, char *key, int ival,
double dval);
extern int PropertyMerge(char *name, int fnum, char *key, int merge_type);
@@ -53,6 +54,8 @@ extern void PortList(char *prefix, char *list_template);
extern char *Cell(char *inststr, char *model, ...);
extern int IsIgnored(char *, int);
extern int auto_blackbox; /* For handling empty subcircuits */
/* netcmp.c */
extern struct nlist *LookupClassEquivalent(char *model, int file1, int file2);
extern void AssignCircuits(char *name1, int file1, char *name2, int file2);
@@ -100,9 +103,9 @@ extern char *Res(char *fname, char *inststr, char *, char *);
extern char *XLine(char *fname, char *inststr, char *, char *, char *, char *);
extern char *Inductor(char *fname, char *inststr, char *, char *);
extern int StringIsValue(char *);
extern int StringIsValue(char *);
extern char *ConvertParam(char *);
extern int ConvertStringToFloat(char *, double *);
extern int ConvertStringToFloat(char *, double *);
extern char *ScaleStringFloatValue(char *, double);
extern void join(char *node1, char *node2);
extern void Connect(char *tplt1, char *tplt2);
@@ -116,7 +119,8 @@ extern void FlattenCurrent();
extern void ConvertGlobals(char *name, int fnum);
extern int CleanupPins(char *name, int fnum);
extern void ConnectAllNodes(char *model, int fnum);
extern void CombineParallel(char *model, int fnum);
extern int CombineParallel(char *model, int fnum);
extern int CombineSerial(char *model, int fnum);
extern int NoDisconnectedNodes;
extern int PropertyKeyMatch(char *, char *);
extern int PropertyValueMatch(char *, char *);
@@ -131,6 +135,7 @@ extern int IgnoreRC; /* set this to 1 to ignore capacitance and resistance */
extern int NoOutput; /* set this to 1 to disable stdout output */
extern int Composition; /* direction of composition */
extern int UnixWildcards; /* TRUE if *,?,{},[] only; false if full REGEXP */
extern int GlobalParallelNone; /* If TRUE, don't parallel combine any cells */
/* magic internal flag to restrict searches to recently placed cells */
extern int QuickSearch;
/* does re"CellDef"ing a cell add to it or overwrite it??? */
+1 -1
View File
@@ -186,7 +186,7 @@ char *ReadNtk (char *fname, int *fnum)
if ((filenum = OpenParseFile(fname, *fnum)) < 0) {
SetExtension(name, fname, NTK_EXTENSION);
if ((filenum = OpenParseFile(name, *fnum)) < 0) {
Printf("No file: %s\n",name);
Printf("Error in ntk file read: No file %s\n",name);
*fnum = filenum;
return NULL;
}
+72 -4
View File
@@ -340,6 +340,71 @@ void CellRehash(char *name, char *newname, int file)
struct nlist *OldCell;
int removeshorted(struct hashlist *p, int file)
{
struct nlist *ptr;
struct objlist *ob, *lob, *nob, *tob;
unsigned char shorted;
ptr = (struct nlist *)(p->ptr);
if ((file != -1) && (ptr->file != file)) return;
lob = NULL;
for (ob = ptr->cell; ob != NULL;) {
nob = ob->next;
if ((ob->type == FIRSTPIN) && (ob->model.class != NULL)) {
if ((*matchfunc)(ob->model.class, OldCell->name)) {
shorted = (unsigned char)1;
for (tob = nob; tob->type > FIRSTPIN; tob = tob->next) {
if (tob->node != ob->node) {
shorted = (unsigned char)0;
break;
}
}
if (shorted == (unsigned char)0) {
lob = ob;
ob = nob;
continue;
}
HashDelete(ob->instance.name, &(ptr->instdict));
while (1) {
FreeObjectAndHash(ob, ptr);
ob = nob;
if (ob == NULL) break;
nob = ob->next;
if (ob->type != PROPERTY && ob->type <= FIRSTPIN) break;
}
if (lob == NULL)
ptr->cell = ob;
else
lob->next = ob;
}
else {
lob = ob;
ob = nob;
}
}
else {
lob = ob;
ob = nob;
}
}
}
/* Remove shorted instances of class "class" from the database */
void RemoveShorted(char *class, int file)
{
if (file == -1)
OldCell = LookupCell(class);
else
OldCell = LookupCellFile(class, file);
if (OldCell == NULL) return;
RecurseCellFileHashTable(removeshorted, file);
}
int deleteclass(struct hashlist *p, int file)
{
struct nlist *ptr;
@@ -360,7 +425,7 @@ int deleteclass(struct hashlist *p, int file)
ob = nob;
if (ob == NULL) break;
nob = ob->next;
if (ob->type <= FIRSTPIN) break;
if (ob->type != PROPERTY && ob->type <= FIRSTPIN) break;
}
if (lob == NULL)
ptr->cell = ob;
@@ -498,8 +563,11 @@ static int PrintCellHashTableElement(struct hashlist *p)
/* only print primitive cells if Debug is enabled */
if (Debug == 1) Printf("Cell: %s (instanced %d times); Primitive\n",
ptr->name, ptr->number);
else if (Debug == 3) { /* list */
Tcl_AppendElement(netgeninterp, ptr->name);
}
}
else if (Debug == 2) { /* list only */
else if ((Debug == 2) || (Debug == 3)) { /* list only */
#ifdef TCL_NETGEN
Tcl_AppendElement(netgeninterp, ptr->name);
#else
@@ -530,7 +598,7 @@ void PrintCellHashTable(int full, int filenum)
bins = RecurseHashTable(&cell_dict, CountHashTableBinsUsed);
total = RecurseHashTable(&cell_dict, CountHashTableEntries);
if (full != 2)
if (full < 2)
Printf("Hash table: %d of %d bins used; %d cells total (%.2f per bin)\n",
bins, CELLHASHSIZE, total, (bins == 0) ? 0 :
(float)((float)total / (float)bins));
@@ -540,7 +608,7 @@ void PrintCellHashTable(int full, int filenum)
RecurseHashTable(&cell_dict, PrintCellHashTableElement);
Debug = OldDebug;
#ifndef TCL_NETGEN
if (full == 2) Printf("\n");
if (full >= 2) Printf("\n");
#endif
}
+14 -5
View File
@@ -104,10 +104,12 @@ struct valuelist {
/* Part 3: Keys & Defaults (kept in the cell record as a hash table) */
#define MERGE_NONE 0 /* Property does not change when devices merge */
#define MERGE_ADD 1 /* Properties sum with device merge */
#define MERGE_ADD_CRIT 2 /* Properties sum with device merge */
#define MERGE_ADD 1 /* Properties sum with device parallel merge */
#define MERGE_ADD_CRIT 2 /* Properties sum with device parallel merge */
#define MERGE_PAR 3 /* Properties add in parallel with device merge */
#define MERGE_PAR_CRIT 4 /* Properties add in parallel with device merge */
#define MERGE_SER 5 /* Properties sum with device parallel merge */
#define MERGE_SER_CRIT 6 /* Properties sum with device parallel merge */
/* Note: A "critical" merge means that the property causes the number of */
/* devices to change. e.g., transistor width is critical; transistor drain */
@@ -159,9 +161,16 @@ extern struct objlist *LastPlaced;
struct IgnoreList {
char *class;
int file;
unsigned char type;
struct IgnoreList *next;
};
/* Types used by IgnoreList above */
#define IGNORE_NONE (unsigned char)0
#define IGNORE_CLASS (unsigned char)1
#define IGNORE_SHORTED (unsigned char)2
/* Record structure for handling pin permutations in a cell */
/* Linked list structure allows multiple permutations per cell. */
@@ -206,10 +215,10 @@ struct nlist {
#define CELL_PROPSMATCHED 0x10 /* properties matched to matching cell */
#define CELL_DUPLICATE 0x20 /* cell has a duplicate */
/* Flags for combination allowances */
/* Flags for combination allowances and prohibitions */
#define COMB_SERIAL 0x20
#define COMB_PARALLEL 0x40
#define COMB_SERIAL 0x40
#define COMB_NO_PARALLEL 0x80
extern struct nlist *CurrentCell;
extern struct objlist *CurrentTail;
-3
View File
@@ -315,7 +315,6 @@ void PrintE(FILE *outfile, int E)
#if 0
INLINE
int UsedLeaves(int E1, int E2)
/* returns the number of leaves in E1 + E2, which are assumed independent */
{
@@ -327,7 +326,6 @@ int UsedLeaves(int E1, int E2)
#endif
INLINE
int CommonNodes(int E1, int E2, int IncludeGlobals)
/* returns the number of nodes that E1 and E2 share */
/* if IncludeGlobals == 0, do not count large connectivity nodes */
@@ -350,7 +348,6 @@ int CommonNodes(int E1, int E2, int IncludeGlobals)
return(result);
}
INLINE
int GlobalNodes(int E)
/* return the number of global nodes that E contacts */
/* for now, global nodes are just cell ports */
+82 -8
View File
@@ -25,8 +25,10 @@ the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
#include <stdarg.h> /* what about varargs, like in pdutils.c ??? */
#endif
#ifdef IBMPC
#include <stdlib.h> /* for calloc(), free() */
#include <stdlib.h> /* for calloc(), free(), getenv() */
#ifndef IBMPC
#include <sys/types.h> /* for getpwnam() tilde expansion */
#include <pwd.h>
#endif
#ifdef TCL_NETGEN
@@ -42,6 +44,10 @@ the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
// Global storage for parameters from .PARAM
struct hashdict spiceparams;
// Global setting for auto-detect of empty subcircuits as
// black-box subcells.
int auto_blackbox = FALSE;
// Check if a token represents a numerical value (with
// units) or an expression. This is basically a hack
// to see if it either passes StringIsValue() or is
@@ -398,6 +404,7 @@ int renamepins(struct hashlist *p, int file)
void CleanupSubcell() {
int maxnode = 0;
int has_devices = FALSE;
struct objlist *sobj, *nobj, *lobj, *pobj;
if (CurrentCell == NULL) return;
@@ -409,6 +416,8 @@ void CleanupSubcell() {
lobj = NULL;
for (sobj = CurrentCell->cell; sobj != NULL;) {
nobj = sobj->next;
if (sobj->type == FIRSTPIN)
has_devices = TRUE;
if (sobj->node < 0) {
if (IsGlobal(sobj)) {
if (lobj != NULL)
@@ -437,6 +446,8 @@ void CleanupSubcell() {
lobj = sobj;
sobj = nobj;
}
if ((has_devices == FALSE) && (auto_blackbox == TRUE))
SetClass(CLASS_MODULE);
}
/*------------------------------------------------------*/
@@ -615,7 +626,7 @@ void ReadSpiceFile(char *fname, int filenum, struct cellstack **CellStackPtr,
}
SpiceTokNoNewline();
}
SetClass((blackbox) ? CLASS_MODULE : CLASS_SUBCKT);
SetClass((blackbox) ? CLASS_MODULE : CLASS_SUBCKT);
if (hasports == 0) {
// If the cell defines no ports, then create a proxy
@@ -743,7 +754,7 @@ skip_ends:
SpiceSkipNewLine();
}
else if (matchnocase(nexttok, ".INCLUDE")) {
char *iname, *iptr, *quotptr, *pathend;
char *iname, *iptr, *quotptr, *pathend, *userpath = NULL;
SpiceTokNoNewline();
if (nexttok == NULL) continue; /* Ignore if no filename */
@@ -755,12 +766,44 @@ skip_ends:
pathend = strrchr(fname, '/');
iptr = nexttok;
while (*iptr == '\'' || *iptr == '\"' || *iptr == '`') iptr++;
if ((pathend != NULL) && (*iptr != '/')) {
if ((pathend != NULL) && (*iptr != '/') && (*iptr != '~')) {
*pathend = '\0';
iname = (char *)MALLOC(strlen(fname) + strlen(iptr) + 2);
sprintf(iname, "%s/%s", fname, iptr);
*pathend = '/';
}
#ifndef IBMPC
else if ((*iptr == '~') && (*(iptr + 1) == '/')) {
/* For ~/<path>, substitute tilde from $HOME */
userpath = getenv("HOME");
iname = (char *)MALLOC(strlen(userpath) + strlen(iptr));
sprintf(iname, "%s%s", userpath, iptr + 1);
}
else if (*iptr == '~') {
/* For ~<user>/<path>, substitute tilde from getpwnam() */
struct passwd *passwd;
char *pathstart;
pathstart = strchr(iptr, '/');
if (pathstart) *pathstart = '\0';
passwd = getpwnam(iptr + 1);
if (passwd != NULL) {
userpath = passwd->pw_dir;
if (pathstart) {
*pathstart = '/';
iname = (char *)MALLOC(strlen(userpath) + strlen(pathstart) + 1);
sprintf(iname, "%s%s", userpath, pathstart);
}
else {
/* Almost certainly an error, but make the substitution anyway */
iname = STRDUP(userpath);
}
}
else {
/* Probably an error, but copy the filename verbatim */
iname = STRDUP(iptr);
}
}
#endif
else
iname = STRDUP(iptr);
@@ -795,7 +838,7 @@ skip_ends:
kl->key = strsave(nexttok);
kl->idx = 0;
kl->type = PROP_STRING;
kl->slop.ival = 0;
kl->slop.dval = 0.0;
kl->pdefault.string = strsave(eqptr + 1);
HashPtrInstall(nexttok, kl, &spiceparams);
}
@@ -1530,6 +1573,8 @@ skip_ends:
else if (toupper(nexttok[0]) == 'X') { /* subcircuit instances */
char instancename[100], subcktname[100];
int itype;
instancename[99] = '\0';
subcktname[99] = '\0';
@@ -1602,6 +1647,34 @@ skip_ends:
if (scan->next != NULL) scan = scan->next;
tail->next = NULL;
/* Check for ignored class */
if ((itype = IsIgnored(subcktname, filenum)) == IGNORE_CLASS) {
Printf("Class '%s' instanced in input but is being ignored.\n", model);
return;
}
/* Check for shorted pins */
if ((itype == IGNORE_SHORTED) && (head != NULL)) {
unsigned char shorted = (unsigned char)1;
struct portelement *p;
for (p = head->next; p; p = p->next) {
if (strcasecmp(head->name, p->name))
shorted = (unsigned char)0;
break;
}
if (shorted == (unsigned char)1) {
Printf("Instance of '%s' is shorted, ignoring.\n", subcktname);
while (head) {
p = head->next;
FREE(head);
head = p;
}
return;
}
}
/* Create cell name and revise instance name based on the cell name */
/* For clarity, if "instancename" does not contain the cellname, */
/* then prepend the cellname to the instance name. HOWEVER, if any */
@@ -1658,6 +1731,7 @@ skip_ends:
}
/* nexttok is now NULL, scan->name points to class */
Instance(subcktname, instancename);
pobj = LinkProperties(subcktname, kvlist);
ReduceExpressions(pobj, NULL, CurrentCell, TRUE);
@@ -1777,7 +1851,7 @@ char *ReadSpiceTop(char *fname, int *fnum, int blackbox)
SetExtension(name, fname, SPICE_EXTENSION);
if ((filenum = OpenParseFile(name, *fnum)) < 0) {
Fprintf(stderr,"No file: %s\n",name);
Fprintf(stderr,"Error in SPICE file read: No file %s\n",name);
*fnum = filenum;
return NULL;
}
@@ -1872,7 +1946,7 @@ void IncludeSpice(char *fname, int parent, struct cellstack **CellStackPtr,
SetExtension(name, fname, SPICE_EXTENSION);
if ((filenum = OpenParseFile(name, parent)) < 0) {
Fprintf(stderr,"No file: %s\n",name);
Fprintf(stderr,"Error in SPICE file read: No file %s\n",name);
return;
}
}
+1 -1
View File
@@ -271,7 +271,7 @@ void initialize_netcmp_datastructures(Widget w, Widget textwidget,
{
X_START();
Printf("Comparing cells '%s' and '%s'\n", get_cell(), get_other());
CreateTwoLists(get_cell(), get_other());
CreateTwoLists(get_cell(), get_other(), 0);
Permute();
#ifdef DEBUG_ALLOC
PrintCoreStats();
+382 -7
View File
@@ -26,6 +26,333 @@ if {${tcl_version} >= 8.6} {
load TCL_DIR/tclnetgenSHDLIB_EXT
}
#----------------------------------------------------------------
# Convert LVS list result into a JSON file
#----------------------------------------------------------------
proc netgen::convert_to_json {filename lvs_final} {
set pidx [string last . $filename]
set jsonname [string replace $filename $pidx end ".json"]
if {![catch {open $jsonname w} fjson]} {
puts $fjson "\["
# Outer list is of each cell compared
set clen [llength $lvs_final]
set cidx 0
foreach circuit $lvs_final {
incr cidx
puts $fjson " \{"
set nkeys [llength $circuit]
set kidx 0
foreach {key value} $circuit {
incr kidx 2
switch $key {
name {
puts $fjson " \"${key}\": \["
set cktval [lindex $value 0]
puts $fjson " \"${cktval}\","
set cktval [lindex $value 1]
puts $fjson " \"${cktval}\""
if {$kidx == $nkeys} {
puts $fjson " \]"
} else {
puts $fjson " \],"
}
}
pins {
puts $fjson " \"${key}\": \["
puts $fjson " \["
set cktval [lindex $value 0]
foreach pin [lrange $cktval 0 end-1] {
puts $fjson " \"$pin\","
}
set pin [lindex $cktval end]
puts $fjson " \"$pin\""
puts $fjson " \], \["
set cktval [lindex $value 1]
foreach pin [lrange $cktval 0 end-1] {
puts $fjson " \"$pin\","
}
set pin [lindex $cktval end]
puts $fjson " \"$pin\""
puts $fjson " \]"
if {$kidx == $nkeys} {
puts $fjson " \]"
} else {
puts $fjson " \],"
}
}
nets {
puts $fjson " \"${key}\": \["
set cktval [lindex $value 0]
puts $fjson " $cktval,"
set cktval [lindex $value 1]
puts $fjson " $cktval"
if {$kidx == $nkeys} {
puts $fjson " \]"
} else {
puts $fjson " \],"
}
}
devices {
puts $fjson " \"${key}\": \["
puts $fjson " \["
set cktval [lindex $value 0]
foreach dev [lrange $cktval 0 end-1] {
set devname [lindex $dev 0]
set devnum [lindex $dev 1]
puts $fjson " \[\"${devname}\", ${devnum}\],"
}
set dev [lindex $cktval end]
set devname [lindex $dev 0]
set devnum [lindex $dev 1]
puts $fjson " \[\"${devname}\", ${devnum} \]"
puts $fjson " \], \["
set cktval [lindex $value 1]
foreach dev [lrange $cktval 0 end-1] {
set devname [lindex $dev 0]
set devnum [lindex $dev 1]
puts $fjson " \[\"${devname}\", ${devnum} \],"
}
set dev [lindex $cktval end]
set devname [lindex $dev 0]
set devnum [lindex $dev 1]
puts $fjson " \[\"${devname}\", ${devnum} \]"
puts $fjson " \]"
if {$kidx == $nkeys} {
puts $fjson " \]"
} else {
puts $fjson " \],"
}
}
goodnets -
badnets {
puts $fjson " \"${key}\": \["
set glen [llength $value]
set gidx 0
foreach group $value {
incr gidx
puts $fjson " \["
puts $fjson " \["
set cktval [lindex $group 0]
set nlen [llength $cktval]
set nidx 0
foreach net $cktval {
incr nidx
puts $fjson " \["
set netname [lindex $net 0]
puts $fjson " \"$netname\","
puts $fjson " \["
set netconn [lindex $net 1]
foreach fanout [lrange $netconn 0 end-1] {
set devname [lindex $fanout 0]
set pinname [lindex $fanout 1]
set count [lindex $fanout 2]
if {$count == {}} {set count 0}
puts $fjson " \[ \"$devname\", \"$pinname\", $count \],"
}
set fanout [lindex $netconn end]
set devname [lindex $fanout 0]
set pinname [lindex $fanout 1]
set count [lindex $fanout 2]
if {$count == {}} {set count 0}
puts $fjson " \[ \"$devname\", \"$pinname\", $count \]"
puts $fjson " \]"
if {$nidx == $nlen} {
puts $fjson " \]"
} else {
puts $fjson " \],"
}
}
puts $fjson " \], \["
set cktval [lindex $group 1]
set nlen [llength $cktval]
set nidx 0
foreach net $cktval {
incr nidx
puts $fjson " \["
set netname [lindex $net 0]
puts $fjson " \"$netname\","
puts $fjson " \["
set netconn [lindex $net 1]
foreach fanout [lrange $netconn 0 end-1] {
set devname [lindex $fanout 0]
set pinname [lindex $fanout 1]
set count [lindex $fanout 2]
if {$count == {}} {set count 0}
puts $fjson " \[ \"$devname\", \"$pinname\", $count \],"
}
set fanout [lindex $netconn end]
set devname [lindex $fanout 0]
set pinname [lindex $fanout 1]
set count [lindex $fanout 2]
if {$count == {}} {set count 0}
puts $fjson " \[ \"$devname\", \"$pinname\", $count \]"
puts $fjson " \]"
if {$nidx == $nlen} {
puts $fjson " \]"
} else {
puts $fjson " \],"
}
}
puts $fjson " \]"
if {$gidx == $glen} {
puts $fjson " \]"
} else {
puts $fjson " \],"
}
}
if {$kidx == $nkeys} {
puts $fjson " \]"
} else {
puts $fjson " \],"
}
}
goodelements -
badelements {
puts $fjson " \"${key}\": \["
set glen [llength $value]
set gidx 0
foreach group $value {
incr gidx
puts $fjson " \["
puts $fjson " \["
set cktval [lindex $group 0]
set ilen [llength $cktval]
set iidx 0
foreach inst $cktval {
incr iidx
puts $fjson " \["
set instname [lindex $inst 0]
puts $fjson " \"$instname\","
puts $fjson " \["
set instpins [lindex $inst 1]
foreach fanout [lrange $instpins 0 end-1] {
set pinname [lindex $fanout 0]
set count [lindex $fanout 1]
if {$count == {}} {set count 0}
puts $fjson " \[ \"$pinname\", $count \],"
}
set fanout [lindex $instpins end]
set pinname [lindex $fanout 0]
set count [lindex $fanout 1]
if {$count == {}} {set count 0}
puts $fjson " \[ \"$pinname\", $count \]"
puts $fjson " \]"
if {$iidx == $ilen} {
puts $fjson " \]"
} else {
puts $fjson " \],"
}
}
puts $fjson " \], \["
set cktval [lindex $group 1]
set ilen [llength $cktval]
set iidx 0
foreach inst $cktval {
incr iidx
puts $fjson " \["
set instname [lindex $inst 0]
puts $fjson " \"$instname\","
puts $fjson " \["
set instpins [lindex $inst 1]
foreach fanout [lrange $instpins 0 end-1] {
set pinname [lindex $fanout 0]
set count [lindex $fanout 1]
if {$count == {}} {set count 0}
puts $fjson " \[ \"$pinname\", $count \],"
}
set fanout [lindex $instpins end]
set pinname [lindex $fanout 0]
set count [lindex $fanout 1]
if {$count == {}} {set count 0}
puts $fjson " \[ \"$pinname\", $count \]"
puts $fjson " \]"
if {$iidx == $ilen} {
puts $fjson " \]"
} else {
puts $fjson " \],"
}
}
puts $fjson " \]"
if {$gidx == $glen} {
puts $fjson " \]"
} else {
puts $fjson " \],"
}
}
if {$kidx == $nkeys} {
puts $fjson " \]"
} else {
puts $fjson " \],"
}
}
properties {
puts $fjson " \"${key}\": \["
set plen [llength $value]
set pidx 0
foreach instance $value {
incr pidx
puts $fjson " \["
set instnames [lindex $instance 0]
set instname0 [lindex $instnames 0]
puts $fjson " \["
puts $fjson " \"${instname0}\","
puts $fjson " \["
foreach property [lrange $instance 1 end-1] {
set prop0 [lindex $property 0]
set propname [lindex $prop0 0]
set propval [lindex $prop0 1]
puts $fjson " \[\"${propname}\", \"${propval}\"\],"
}
set property [lindex $instance end]
set prop0 [lindex $property 0]
set propname [lindex $prop0 0]
set propval [lindex $prop0 1]
puts $fjson " \[\"${propname}\", \"${propval}\"\]"
puts $fjson " \]"
puts $fjson " \],"
set instname1 [lindex $instnames 1]
puts $fjson " \["
puts $fjson " \"${instname1}\","
puts $fjson " \["
foreach property [lrange $instance 1 end-1] {
set prop1 [lindex $property 1]
set propname [lindex $prop1 0]
set propval [lindex $prop1 1]
puts $fjson " \[\"${propname}\", \"${propval}\"\],"
}
set property [lindex $instance end]
set prop1 [lindex $property 1]
set propname [lindex $prop1 0]
set propval [lindex $prop1 1]
puts $fjson " \[\"${propname}\", \"${propval}\"\]"
puts $fjson " \]"
puts $fjson " \]"
if {$pidx == $plen} {
puts $fjson " \]"
} else {
puts $fjson " \],"
}
}
if {$kidx == $nkeys} {
puts $fjson " \]"
} else {
puts $fjson " \],"
}
}
}
}
if {$cidx == $clen} {
puts $fjson " \}"
} else {
puts $fjson " \},"
}
}
puts $fjson "\]"
}
close $fjson
}
#----------------------------------------------------------------
# Define the "lvs" command as a way of calling the netgen options
# for standard compare, essentially the same as the old "netcomp"
@@ -34,9 +361,30 @@ if {${tcl_version} >= 8.6} {
# Use the "canonical" command to parse the file and cell names,
# although if the cells have not been read in yet, then the
# original syntax of filename or {filename cellname} is required.
#
# "args" is passed to verify and may therefore contain only the
# value "-list" or nothing. If "-list", then output is returned
# as a nested list.
#----------------------------------------------------------------
proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out}} {
proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {
set dolist 0
set dojson 0
foreach arg $args {
if {$arg == "-list"} {
puts stdout "Generating list result"
set dolist 1
set lvs_final {}
} elseif {$arg == "-json"} {
puts stdout "Generating JSON file result"
set dolist 1
set dojson 1
set lvs_final {}
} elseif {$arg == "-blackbox"} {
puts stdout "Treating empty subcircuits as black-box cells"
netgen::model blackbox on
}
}
# Allow name1 or name2 to be a list of {filename cellname},
# A single <filename>, or any valid_cellname form if the
@@ -137,24 +485,40 @@ proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out}} {
netgen::log file $logfile
netgen::log start
netgen::log echo off
set endval [netgen::compare hierarchical "$fnum1 $cell1" "$fnum2 $cell2"]
if {$dolist == 1} {
set endval [netgen::compare -list hierarchical "$fnum1 $cell1" "$fnum2 $cell2"]
} else {
set endval [netgen::compare hierarchical "$fnum1 $cell1" "$fnum2 $cell2"]
}
if {$endval == {}} {
netgen::log put "No cells in queue!\n"
return
}
set properr {}
while {$endval != {}} {
netgen::run converge
if {$dolist == 1} {
netgen::run -list converge
} else {
netgen::run converge
}
netgen::log echo on
if {[verify equivalent]} {
# Resolve automorphisms by pin and property
netgen::run resolve
if {$dolist == 1} {
netgen::run -list resolve
} else {
netgen::run resolve
}
set uresult [verify unique]
if {$uresult == 0} {
netgen::log put " Networks match locally but not globally.\n"
netgen::log put " Probably connections are swapped.\n"
netgen::log put " Check the end of logfile ${logfile} for implicated nodes.\n"
netgen::verify nodes
if {$dolist == 1} {
verify -list nodes
} else {
verify nodes
}
# Flatten the non-matching subcircuit (but not the top-level cells)
if {[netgen::print queue] != {}} {
@@ -183,17 +547,28 @@ proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out}} {
}
}
netgen::log echo off
set endval [netgen::compare hierarchical]
if {$dolist == 1} {
catch {lappend lvs_final $lvs_out}
set lvs_out {}
set endval [netgen::compare -list hierarchical]
} else {
set endval [netgen::compare hierarchical]
}
}
netgen::log echo off
puts stdout "Result: " nonewline
netgen::log echo on
netgen::verify only
verify only
if {$properr != {}} {
netgen::log put "The following cells had property errors: $properr\n"
}
netgen::log end
puts stdout "LVS Done."
if {$dojson == 1} {
netgen::convert_to_json $logfile $lvs_final
} elseif {$dolist == 1} {
return $lvs_final
}
}
# It is important to make sure no netgen commands overlap with Tcl built-in
+330 -66
View File
@@ -497,7 +497,9 @@ CommonParseCell(Tcl_Interp *interp, Tcl_Obj *objv,
fnum = -1;
}
else
filename = Tcl_GetString(fobj);
/* Both file numbers have been provided, so a */
/* filename is not required. */
filename = NULL;
}
else {
filename = NULL;
@@ -1435,9 +1437,9 @@ _netgen_cells(ClientData clientData,
char *optstart;
int filenum = -1;
struct nlist *np = NULL;
int result, dolist = 0;
int result, printopt, dolist = 0, doall = 0, dotop = 0;
if (objc > 1) {
while (objc > 1) {
optstart = Tcl_GetString(objv[1]);
if (*optstart == '-') optstart++;
if (!strcmp(optstart, "list")) {
@@ -1445,27 +1447,41 @@ _netgen_cells(ClientData clientData,
objv++;
objc--;
}
else if (!strcmp(optstart, "all")) {
doall = 1;
objv++;
objc--;
}
else if (!strcmp(optstart, "top")) {
dotop = 1;
objv++;
objc--;
}
else {
result = CommonParseCell(interp, objv[1], &np, &filenum);
if (result != TCL_OK) return result;
objv++;
objc--;
}
}
if (objc == 1) {
PrintCellHashTable((dolist) ? 2 : 0, -1);
}
else if (objc != 2) {
Tcl_WrongNumArgs(interp, 1, objv, "[list] [-all|-top|valid_filename]");
if (objc != 1) {
Tcl_WrongNumArgs(interp, 1, objv, "[list] [-top] [-all] [valid_filename]");
return TCL_ERROR;
}
else {
Tcl_Obj *lobj;
repstr = Tcl_GetString(objv[1]);
if (!strncmp(repstr, "-top", 4)) {
if (dotop) {
if (dolist)
lobj = Tcl_NewListObj(0, NULL);
else
Fprintf(stdout, "Top level cells: ");
np = FirstCell();
while (np != NULL) {
if (np->flags & CELL_TOP) {
if ((np->flags & CELL_TOP) && ((filenum == -1) ||
(np->file == filenum))) {
if (dolist)
Tcl_ListObjAppendElement(interp, lobj,
Tcl_NewStringObj(np->name, -1));
@@ -1481,11 +1497,13 @@ _netgen_cells(ClientData clientData,
return TCL_OK;
}
else if (strncmp(repstr, "-all", 4)) {
result = CommonParseCell(interp, objv[1], &np, &filenum);
if (result != TCL_OK) return result;
else {
if (dolist)
printopt = (doall) ? 3 : 2;
else
printopt = (doall) ? 1 : 0;
PrintCellHashTable(printopt, filenum);
}
PrintCellHashTable((dolist) ? 2 : 1, filenum);
}
return TCL_OK;
}
@@ -1526,8 +1544,27 @@ _netgen_model(ClientData clientData,
return TCL_ERROR;
}
/* Check for "model blackbox on|off" */
/* Behavior is to treat empty subcircuits as blackbox cells */
if ((objc > 1) && !strcmp(Tcl_GetString(objv[1]), "blackbox")) {
if ((objc > 2) && !strcmp(Tcl_GetString(objv[2]), "on")) {
auto_blackbox = TRUE;
return TCL_OK;
}
else if ((objc > 2) && !strcmp(Tcl_GetString(objv[2]), "off")) {
auto_blackbox = FALSE;
return TCL_OK;
}
else if (objc == 2) {
Tcl_SetObjResult(interp, Tcl_NewBooleanObj(auto_blackbox));
return TCL_OK;
}
}
result = CommonParseCell(interp, objv[1], &tp, &fnum);
if (result != TCL_OK) return result;
if (result != TCL_OK)
return result;
if (objc == 3) {
model = Tcl_GetString(objv[2]);
@@ -1639,6 +1676,13 @@ _netgen_model(ClientData clientData,
retclass = modelclasses[SUBCKT_IDX];
break;
case CLASS_MODULE:
if (auto_blackbox)
retclass = modelclasses[BLACKBOX_IDX];
else
retclass = modelclasses[MODULE_IDX];
break;
default: /* (includes case CLASS_UNDEF) */
retclass = modelclasses[UNDEF_IDX];
break;
@@ -1937,13 +1981,24 @@ int
_netcmp_compare(ClientData clientData,
Tcl_Interp *interp, int objc, Tcl_Obj *CONST objv[])
{
char *name1, *name2, *file1, *file2;
int fnum1, fnum2;
char *name1, *name2, *file1, *file2, *optstart;
int fnum1, fnum2, dolist = 0;
int dohierarchy = FALSE;
int assignonly = FALSE;
int argstart = 1, qresult, llen, result;
struct Correspond *nextcomp;
struct nlist *tp;
Tcl_Obj *flist = NULL;
if (objc > 1) {
optstart = Tcl_GetString(objv[1]);
if (*optstart == '-') optstart++;
if (!strcmp(optstart, "list")) {
dolist = 1;
objv++;
objc--;
}
}
if (objc > 1) {
if (!strncmp(Tcl_GetString(objv[argstart]), "assign", 6)) {
@@ -2022,10 +2077,6 @@ _netcmp_compare(ClientData clientData,
return TCL_ERROR;
}
// WIP!
// CleanupPins(name1, fnum1); // Remove unconnected pins
// CleanupPins(name2, fnum2); // Remove unconnected pins
UniquePins(name1, fnum1); // Check for and remove duplicate pins
UniquePins(name2, fnum2); // Check for and remove duplicate pins
@@ -2035,22 +2086,15 @@ _netcmp_compare(ClientData clientData,
ConvertGlobals(name2, fnum2);
}
// Run cleanup a 2nd time; this corrects for cells that have no ports
// but define global nodes that are brought out as ports by
// ConvertGlobals().
// WIP!
// CleanupPins(name1, fnum1);
// CleanupPins(name2, fnum2);
CreateTwoLists(name1, fnum1, name2, fnum2);
CreateTwoLists(name1, fnum1, name2, fnum2, dolist);
while (PrematchLists(name1, fnum1, name2, fnum2) > 0) {
Fprintf(stdout, "Making another compare attempt.\n");
CreateTwoLists(name1, fnum1, name2, fnum2);
CreateTwoLists(name1, fnum1, name2, fnum2, dolist);
}
// Return the names of the two cells being compared, if doing "compare
// hierarchical"
// hierarchical". If "-list" was specified, then append the output
// to the end of the list.
if (dohierarchy) {
Tcl_Obj *lobj;
@@ -2248,6 +2292,19 @@ _netcmp_run(ClientData clientData,
};
int result, index;
int automorphisms;
char *optstart;
int dolist;
dolist = 0;
if (objc > 1) {
optstart = Tcl_GetString(objv[1]);
if (*optstart == '-') optstart++;
if (!strcmp(optstart, "list")) {
dolist = 1;
objv++;
objc--;
}
}
if (objc == 1)
index = RESOLVE_IDX;
@@ -2266,8 +2323,13 @@ _netcmp_run(ClientData clientData,
else {
enable_interrupt();
while (!Iterate() && !InterruptPending);
_netcmp_verify(clientData, interp, 1, NULL);
if (dolist) {
result = _netcmp_verify(clientData, interp, 2, objv - 1);
}
else
result = _netcmp_verify(clientData, interp, 1, NULL);
disable_interrupt();
if (result != TCL_OK) return result;
}
break;
case RESOLVE_IDX:
@@ -2310,7 +2372,7 @@ _netcmp_run(ClientData clientData,
}
if (PropertyErrorDetected) {
Fprintf(stdout, "There were property errors.\n");
PrintPropertyResults();
PrintPropertyResults(dolist);
}
disable_interrupt();
}
@@ -2324,9 +2386,17 @@ _netcmp_run(ClientData clientData,
/* Syntax: netgen::verify [option] */
/* options: nodes, elements, only, all, */
/* equivalent, or unique. */
/* option "-list" may be used with nodes, elements */
/* all, or no option. */
/* Formerly: v */
/* Results: */
/* For only, equivalent, unique: Return 1 if */
/* verified, zero if not. */
/* Side Effects: */
/* For options elements, nodes, and all without */
/* option -list: Write output to log file. */
/* For -list options, append list to global */
/* variable "lvs_out", if it exists. */
/*------------------------------------------------------*/
int
@@ -2339,8 +2409,23 @@ _netcmp_verify(ClientData clientData,
enum OptionIdx {
NODE_IDX, ELEM_IDX, PROP_IDX, ONLY_IDX, ALL_IDX, EQUIV_IDX, UNIQUE_IDX
};
char *optstart;
int result, index = -1;
int automorphisms;
int dolist = 0;
Tcl_Obj *egood, *ebad, *ngood, *nbad;
if (objc > 1) {
optstart = Tcl_GetString(objv[1]);
if (*optstart == '-') optstart++;
if (!strcmp(optstart, "list")) {
dolist = 1;
egood = ngood = NULL;
ebad = nbad = NULL;
objv++;
objc--;
}
}
if (objc != 1 && objc != 2) {
Tcl_WrongNumArgs(interp, 1, objv,
@@ -2371,14 +2456,28 @@ _netcmp_verify(ClientData clientData,
if (objc == 1 || index == NODE_IDX || index == ALL_IDX) {
if (Debug == TRUE)
PrintIllegalNodeClasses(); // Old style
else
FormatIllegalNodeClasses(); // Side-by-side
else {
FormatIllegalNodeClasses(); // Side-by-side, to log file
if (dolist) {
nbad = ListNodeClasses(FALSE); // As Tcl nested list
#if 0
ngood = ListNodeClasses(TRUE); // As Tcl nested list
#endif
}
}
}
if (objc == 1 || index == ELEM_IDX || index == ALL_IDX) {
if (Debug == TRUE)
PrintIllegalElementClasses(); // Old style
else
FormatIllegalElementClasses(); // Side-by-side
else {
FormatIllegalElementClasses(); // Side-by-side, to log file
if (dolist) {
ebad = ListElementClasses(FALSE); // As Tcl nested list
#if 0
egood = ListElementClasses(TRUE); // As Tcl nested list
#endif
}
}
}
disable_interrupt();
if (index == EQUIV_IDX || index == UNIQUE_IDX)
@@ -2409,9 +2508,57 @@ _netcmp_verify(ClientData clientData,
Fprintf(stdout, "Property errors were found.\n");
}
}
if ((index == PROP_IDX) && (PropertyErrorDetected != 0)) {
PrintPropertyResults();
#if 0
if (dolist) {
ngood = ListNodeClasses(TRUE); // As Tcl nested list
egood = ListElementClasses(TRUE); // As Tcl nested list
}
#endif
if ((index == PROP_IDX) && (PropertyErrorDetected != 0)) {
PrintPropertyResults(dolist);
}
}
}
/* If "dolist" has been specified, then return the */
/* list-formatted output. For "verify nodes" or */
/* "verify elements", return the associated list. */
/* For "verify" or "verify all", return a nested */
/* list of {node list, element list}. */
if (dolist)
{
if (objc == 1 || index == NODE_IDX || index == ALL_IDX) {
if (nbad == NULL) nbad = Tcl_NewListObj(0, NULL);
Tcl_SetVar2Ex(interp, "lvs_out", NULL,
Tcl_NewStringObj("badnets", -1),
TCL_APPEND_VALUE | TCL_LIST_ELEMENT);
Tcl_SetVar2Ex(interp, "lvs_out", NULL, nbad,
TCL_APPEND_VALUE | TCL_LIST_ELEMENT);
#if 0
if (ngood == NULL) ngood = Tcl_NewListObj(0, NULL);
Tcl_SetVar2Ex(interp, "lvs_out", NULL,
Tcl_NewStringObj("goodnets", -1),
TCL_APPEND_VALUE | TCL_LIST_ELEMENT);
Tcl_SetVar2Ex(interp, "lvs_out", NULL, ngood,
TCL_APPEND_VALUE | TCL_LIST_ELEMENT);
#endif
}
if (objc == 1 || index == ELEM_IDX || index == ALL_IDX) {
if (ebad == NULL) ebad = Tcl_NewListObj(0, NULL);
Tcl_SetVar2Ex(interp, "lvs_out", NULL,
Tcl_NewStringObj("badelements", -1),
TCL_APPEND_VALUE | TCL_LIST_ELEMENT);
Tcl_SetVar2Ex(interp, "lvs_out", NULL, ebad,
TCL_APPEND_VALUE | TCL_LIST_ELEMENT);
#if 0
if (egood == NULL) egood = Tcl_NewListObj(0, NULL);
Tcl_SetVar2Ex(interp, "lvs_out", NULL,
Tcl_NewStringObj("goodelements", -1),
TCL_APPEND_VALUE | TCL_LIST_ELEMENT);
Tcl_SetVar2Ex(interp, "lvs_out", NULL, egood,
TCL_APPEND_VALUE | TCL_LIST_ELEMENT);
#endif
}
}
return TCL_OK;
@@ -2518,10 +2665,10 @@ _netcmp_ignore(ClientData clientData,
Tcl_Interp *interp, int objc, Tcl_Obj *CONST objv[])
{
char *options[] = {
"class", NULL
"class", "shorted", NULL
};
enum OptionIdx {
CLASS_IDX
CLASS_IDX, SHORTED_IDX
};
int result, index;
int file = -1;
@@ -2542,7 +2689,14 @@ _netcmp_ignore(ClientData clientData,
Tcl_WrongNumArgs(interp, 1, objv, "[class] valid_cellname");
return TCL_ERROR;
}
IgnoreClass(name, file);
switch (index) {
case CLASS_IDX:
IgnoreClass(name, file, IGNORE_CLASS);
break;
case SHORTED_IDX:
IgnoreClass(name, file, IGNORE_SHORTED);
break;
}
return TCL_OK;
}
@@ -2565,13 +2719,23 @@ _netcmp_equate(ClientData clientData,
NODE_IDX, ELEM_IDX, CLASS_IDX, PINS_IDX
};
int result, index;
char *name1 = NULL, *name2 = NULL;
struct nlist *tp1, *tp2;
char *name1 = NULL, *name2 = NULL, *optstart;
struct nlist *tp1, *tp2, *SaveC1, *SaveC2;
struct objlist *ob1, *ob2;
int file1, file2;
int i, l1, l2, ltest, lent;
int i, l1, l2, ltest, lent, dolist = 0;
Tcl_Obj *tobj1, *tobj2, *tobj3;
if (objc > 1) {
optstart = Tcl_GetString(objv[1]);
if (*optstart == '-') optstart++;
if (!strcmp(optstart, "list")) {
dolist = 1;
objv++;
objc--;
}
}
if ((objc != 2) && (objc != 4) && (objc != 6)) {
Tcl_WrongNumArgs(interp, 1, objv, "?nodes|elements|classes|pins? name1 name2");
return TCL_ERROR;
@@ -2727,7 +2891,7 @@ _netcmp_equate(ClientData clientData,
break;
case PINS_IDX:
if (ElementClasses == NULL) {
if ((ElementClasses == NULL) && (auto_blackbox == FALSE)) {
if (CurrentCell == NULL)
Fprintf(stderr, "Equate elements: no current cell.\n");
Fprintf(stderr, "Equate pins: cell %s and/or %s has no elements.\n",
@@ -2735,19 +2899,30 @@ _netcmp_equate(ClientData clientData,
Tcl_SetObjResult(interp, Tcl_NewBooleanObj(0));
return TCL_OK;
}
if (tp1 == Circuit1 && tp2 == Circuit2) {
if (MatchPins(tp1, tp2)) {
Fprintf(stdout, "Cell pin lists are equivalent.\n");
Tcl_SetObjResult(interp, Tcl_NewBooleanObj(1));
}
else {
Fprintf(stdout, "Cell pin lists for %s and %s altered to match.\n",
name1, name2);
Tcl_SetObjResult(interp, Tcl_NewBooleanObj(0));
}
else if (ElementClasses == NULL) {
/* This has been called outside of a netlist compare, */
/* probably to force name matching of pins on black-box */
/* devices. But MatchPins only works if tp1 == Circuit1 */
/* and tp2 == Circuit2, so preserve these values and */
/* recover afterward (what a hack). */
SaveC1 = Circuit1;
SaveC2 = Circuit2;
Circuit1 = tp1;
Circuit2 = tp2;
}
if (MatchPins(tp1, tp2, dolist)) {
Fprintf(stdout, "Cell pin lists are equivalent.\n");
Tcl_SetObjResult(interp, Tcl_NewBooleanObj(1));
}
else {
Fprintf(stderr, "Function not yet defined outside of LVS scope.\n");
Fprintf(stdout, "Cell pin lists for %s and %s altered to match.\n",
name1, name2);
Tcl_SetObjResult(interp, Tcl_NewBooleanObj(0));
}
if (ElementClasses == NULL) {
/* Recover temporarily set global variables (see above) */
Circuit1 = SaveC1;
Circuit2 = SaveC2;
}
break;
@@ -2966,6 +3141,17 @@ _netcmp_equate(ClientData clientData,
/* merge --- set property merge behavior */
/* or */
/* netgen::property default */
/* or */
/* netgen::property <device>|<model> <option> */
/* yes|no */
/* Where <option> is one of: */
/* serial --- allow/prohibit serial combination */
/* parallel --- allow/prohibit parallel combination */
/* or */
/* netgen::property parallel none */
/* --- prohibit parallel combinations by */
/* default. */
/* */
/* Formerly: (none) */
/* Results: */
/* Side Effects: */
@@ -2983,10 +3169,12 @@ _netcmp_property(ClientData clientData,
int ival, argstart;
char *options[] = {
"add", "create", "remove", "delete", "tolerance", "merge", NULL
"add", "create", "remove", "delete", "tolerance", "merge", "serial",
"parallel", NULL
};
enum OptionIdx {
ADD_IDX, CREATE_IDX, REMOVE_IDX, DELETE_IDX, TOLERANCE_IDX, MERGE_IDX
ADD_IDX, CREATE_IDX, REMOVE_IDX, DELETE_IDX, TOLERANCE_IDX, MERGE_IDX,
SERIAL_IDX, PARALLEL_IDX
};
int result, index, idx2;
@@ -2998,10 +3186,18 @@ _netcmp_property(ClientData clientData,
};
char *mergeoptions[] = {
"none", "add", "add_critical", "par", "par_critical", NULL
"none", "add", "add_critical", "par", "par_critical",
"parallel", "parallel_critical", "ser_critical", "ser",
"serial_critical", "serial", NULL
};
enum MergeOptionIdx {
NONE_IDX, ADD_ONLY_IDX, ADD_CRIT_IDX, PAR_ONLY_IDX, PAR_CRIT_IDX
NONE_IDX, ADD_ONLY_IDX, ADD_CRIT_IDX,
PAR_ONLY_IDX, PAR_CRIT_IDX, PAR2_ONLY_IDX, PAR2_CRIT_IDX,
SER_CRIT_IDX, SER_IDX, SER2_CRIT_IDX, SER2_IDX
};
char *yesno[] = {
"on", "yes", "true", "enable", "allow",
"off", "no", "false", "disable", "prohibit", NULL
};
if (objc < 2) {
@@ -3018,8 +3214,8 @@ _netcmp_property(ClientData clientData,
/* compare source/drain area and perimeter. */
tp = FirstCell();
while (tp != NULL) {
switch (tp->class) {
while (tp != NULL) {
switch (tp->class) {
case CLASS_NMOS: case CLASS_PMOS: case CLASS_FET3:
case CLASS_NMOS4: case CLASS_PMOS4: case CLASS_FET4:
case CLASS_FET:
@@ -3030,7 +3226,9 @@ _netcmp_property(ClientData clientData,
PropertyDelete(tp->name, tp->file, "pd");
break;
case CLASS_RES: case CLASS_RES3:
PropertyMerge(tp->name, tp->file, "l", MERGE_PAR_CRIT);
PropertyMerge(tp->name, tp->file, "w", MERGE_ADD_CRIT);
PropertyMerge(tp->name, tp->file, "l", MERGE_SER_CRIT);
tp->flags |= COMB_SERIAL;
break;
case CLASS_CAP: case CLASS_ECAP: case CLASS_CAP3:
// NOTE: No attempt to combine area, width, or length;
@@ -3039,12 +3237,29 @@ _netcmp_property(ClientData clientData,
break;
case CLASS_INDUCTOR:
PropertyMerge(tp->name, tp->file, "value", MERGE_PAR_CRIT);
tp->flags |= COMB_SERIAL;
break;
}
tp = NextCell();
}
return TCL_OK;
}
else if ((objc == 3) && (!strcmp(Tcl_GetString(objv[1]), "parallel"))) {
if (!strcmp(Tcl_GetString(objv[2]), "none")) {
GlobalParallelNone = TRUE;
SetParallelCombine(FALSE);
}
else if (!strcmp(Tcl_GetString(objv[2]), "all")) {
GlobalParallelNone = FALSE;
SetParallelCombine(TRUE);
}
else {
Tcl_SetResult(interp, "Bad option, should be property parallel none|all",
NONE);
return TCL_ERROR;
}
return TCL_OK;
}
result = CommonParseCell(interp, objv[1], &tp, &fnum);
if (result != TCL_OK) return result;
@@ -3094,6 +3309,45 @@ _netcmp_property(ClientData clientData,
argstart = 3;
switch (index) {
case SERIAL_IDX:
case PARALLEL_IDX:
if (objc == 3) {
if (index == SERIAL_IDX) {
tobj1 = Tcl_NewBooleanObj((tp->flags & COMB_SERIAL) ? 1 : 0);
Tcl_SetObjResult(interp, tobj1);
return TCL_OK;
}
else {
tobj1 = Tcl_NewBooleanObj((tp->flags & COMB_NO_PARALLEL) ? 0 : 1);
Tcl_SetObjResult(interp, tobj1);
return TCL_OK;
}
}
else if (objc == 4) {
if (Tcl_GetIndexFromObj(interp, objv[3],
(CONST84 char **)yesno,
"combine", 0, &idx2) != TCL_OK) {
Tcl_WrongNumArgs(interp, 3, objv, "enable|disable");
return TCL_ERROR;
}
if (idx2 <= 4) { /* true, enable, etc. */
if (index == SERIAL_IDX)
tp->flags |= COMB_SERIAL;
else
tp->flags &= ~COMB_NO_PARALLEL;
}
else { /* false, disable, etc. */
if (index == SERIAL_IDX)
tp->flags &= ~COMB_SERIAL;
else
tp->flags |= COMB_NO_PARALLEL;
}
}
else {
Tcl_WrongNumArgs(interp, 2, objv, "serial|parallel enable|disable");
return TCL_ERROR;
}
break;
case ADD_IDX:
case CREATE_IDX:
@@ -3297,11 +3551,21 @@ _netcmp_property(ClientData clientData,
mergeval = MERGE_ADD_CRIT;
break;
case PAR_ONLY_IDX:
case PAR2_ONLY_IDX:
mergeval = MERGE_PAR;
break;
case PAR_CRIT_IDX:
case PAR2_CRIT_IDX:
mergeval = MERGE_PAR_CRIT;
break;
case SER_CRIT_IDX:
case SER2_CRIT_IDX:
mergeval = MERGE_SER_CRIT;
break;
case SER_IDX:
case SER2_IDX:
mergeval = MERGE_SER;
break;
}
PropertyMerge(tp->name, fnum, Tcl_GetString(tobj1), mergeval);
}