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11 Commits
Author SHA1 Message Date
Tim Edwards 9b0afa893d Merge branch 'master' into netgen-1.5 2023-10-04 02:00:01 -04:00
Tim Edwards f59c9ebcb7 Corrected an issue where a mismatch in property type (e.g.,
string vs. integer) will cause a segfault.  Not sure if
type promotion is needed at that point because the failing case
was a syntax error that caused a double value to be interpreted
as a string because it could not be cast into a numeric form.
2023-10-03 19:39:01 -04:00
Tim Edwards c0f7ebd625 Merge branch 'master' into netgen-1.5 2023-09-05 02:00:01 -04:00
Tim Edwards ce097d5d76 One minor change to the previous commit: The check for shorting
devices between two ports is ignored for top-level cells, because
the scrambled ports won't affect anything in that case, and the
error will be reported as a port error, as it should.
2023-09-04 14:47:23 -04:00
Tim Edwards 619409556c Modified the handling of zero-valued resistors and voltage sources
so that they are *not* removed to make a better match if they are
shorting across two ports.  If removed, then the port lists will
get screwed up.  It is better to let the subcircuits fail matching.
Then, after the mismatched subcircuits are flattened, if the zero-
valued resistor or voltage source no longer connects two ports, it
can be safely removed to make a better match.
2023-09-04 14:40:30 -04:00
Tim Edwards b1374e2bc8 Made two changes to the verilog token parsing in netfile.c in
response to Mitch Bailey's github issue #82:

(1) When skipping comments, skip the contents of "(* ... *)"
    delimiters as well as "/* ... */" delimiters.

(2) When checking for qflow's "\abcd\" names (final space
    replaced with a backslash for SPICE compatibility of
    names), make sure that the last "\" is followed by end-
    of-string.  Otherwise names like "\a\bcd " will fail to
    parse correctly.
2023-09-04 10:50:59 -04:00
Tim Edwards 9e9288f746 Merge branch 'master' into netgen-1.5 2023-09-02 02:00:02 -04:00
Tim Edwards cff954f36a Removed a block of ill-considered code that moves pins together
when they are shorted, because doing so is scrambling the pin
order of cells with respect to the instance calls to the cell.
Not sure if there is any code that relies on shorted pins being
adjacent, though.
2023-09-01 16:04:41 -04:00
Tim Edwards c27d933adc Modified some of the verilog read-in code to avoid a segmentation
fault that would happen if the verilog had illegal syntax of a
misspelled net name (although normally netgen is expected not to
have to check the verilog for syntax, and there are probably many
such cases of netgen failing to handle incorrect verilog and then
crashing as a result).
2023-09-01 09:04:44 -04:00
Tim Edwards bcbc736b51 Merge branch 'master' into netgen-1.5 2023-08-28 02:00:03 -04:00
Tim Edwards 615c55cbe2 Updated the config.guess and config.sub files; the newer ones
support, among other things, RISC-V.
2023-08-27 11:53:16 -04:00
7 changed files with 2254 additions and 1871 deletions
+1 -1
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@@ -1 +1 @@
1.5.255
1.5.259
+32 -11
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@@ -1215,7 +1215,6 @@ int UniquePins(char *name, int filenum)
firstport = (struct objlist **)CALLOC(maxnode + 1, sizeof(struct objlist *));
portcount = FIRSTPIN;
lob = NULL;
for (ob = ThisCell->cell; ob != NULL; ob = ob->next) {
if (ob->type != PORT) break;
if (ob->node > 0) {
@@ -1226,16 +1225,12 @@ int UniquePins(char *name, int filenum)
firstport[ob->node]->name, ThisCell->name, ThisCell->file);
/* Do not count this as a duplicate pin. */
nodecount[ob->node]--;
/* Move the pin adjacent to the one it is shorted to (if it
* isn't already); this will make the work of MatchPins() easier.
/* Note: Previously there was code here to move the shorted port
* next to the pin it is shorted to. This causes the cell def pins
* to become scrambled with respect to the pin order of its instances.
* Removed the code 9/1/2023. But---Not sure if any code depends
* on shorted pins being adjacent.
*/
if (firstport[ob->node]->next != ob) {
lob->next = ob->next;
ob->next = firstport[ob->node]->next;
firstport[ob->node]->next = ob;
ob = lob;
}
lob = ob;
continue;
}
else {
@@ -1256,7 +1251,6 @@ int UniquePins(char *name, int filenum)
}
}
portcount++;
lob = ob;
}
if (needscleanup)
@@ -1954,6 +1948,33 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
break;
}
}
/* Do NOT remove shorting devices that */
/* connect two ports. Otherwise the */
/* port lists get screwed up. It is */
/* better in that case to force the */
/* cells to be declared mismatched. */
/* This is ignored for a top-level cell */
/* because it will just show up as a */
/* port mismatch error as it should. */
if (!(tc1->flags & CELL_TOP) &&
(ecomp->cell1->class != CLASS_ISOURCE)) {
int found1 = FALSE;
int found2 = FALSE;
for (ob2 = tc1->cell; ob2; ob2 = ob2->next) {
if (!IsPort(ob2)) break;
else if (ob2->node == node1)
found1 = TRUE;
else if (ob2->node == node2)
found2 = TRUE;
if (found1 && found2) {
found = FALSE;
break;
}
}
}
if (found) break;
}
if (found) {
+16 -7
View File
@@ -5026,21 +5026,30 @@ int PropertyOptimize(struct objlist *ob, struct nlist *tp, int run, int series,
switch(vl->type) {
case PROP_DOUBLE:
case PROP_VALUE:
dval = 2 * fabs(vl->value.dval - vl2->value.dval)
if ((vl2->type == PROP_DOUBLE) || (vl2->type == PROP_VALUE)) {
dval = 2 * fabs(vl->value.dval - vl2->value.dval)
/ (vl->value.dval + vl2->value.dval);
if (dval <= kl->slop.dval) pmatch++;
if (dval <= kl->slop.dval) pmatch++;
}
break;
case PROP_INTEGER:
ival = abs(vl->value.ival - vl2->value.ival);
if (ival <= kl->slop.ival) pmatch++;
if (vl2->type == PROP_INTEGER) {
ival = abs(vl->value.ival - vl2->value.ival);
if (ival <= kl->slop.ival) pmatch++;
}
break;
case PROP_STRING:
if ((*matchfunc)(vl->value.string, vl2->value.string)) pmatch++;
if (vl2->type == PROP_STRING) {
if ((*matchfunc)(vl->value.string, vl2->value.string)) pmatch++;
}
break;
/* will not attempt to match expressions, but it could
/* Will not attempt to match expressions, but it could
* be done with some minor effort by matching each
* stack token and comparing those that are strings.
* Likewise, will not attempt to match properties
* whose types are mismatched, but they could be
* promoted here.
*/
}
}
@@ -7778,7 +7787,7 @@ int MatchPins(struct nlist *tc1, struct nlist *tc2, int dolist)
else if ((ob1->node != -1) && (ob2->node != -1)) {
/* Check for the case of ports on both sides being shorted
* together. That means that the nodes on both sides connect
* only to ports, that they connec to the same number of ports,
* only to ports, that they connect to the same number of ports,
* and that each port pair has a matching name.
*/
int onlyports = 1;
+8 -2
View File
@@ -611,7 +611,8 @@ void SpiceTokNoNewline(void)
}
/*----------------------------------------------------------------------*/
/* Skip to the next token, ignoring any C-style comments. */
/* Skip to the next token, ignoring any C-style comments and verilog */
/* "(* ... *)"-style comments. */
/*----------------------------------------------------------------------*/
void SkipTokComments(char *delimiter)
@@ -627,6 +628,11 @@ void SkipTokComments(char *delimiter)
SkipTok(delimiter);
if (nexttok) SkipTok(delimiter);
}
else if (match(nexttok, "(*")) {
while (nexttok && !match(nexttok, "*)"))
SkipTok(delimiter);
if (nexttok) SkipTok(delimiter);
}
else break;
}
}
@@ -731,7 +737,7 @@ char *strdtok(char *pstring, char *delim1, char *delim2)
if (*s == '\\') {
s++;
while (*s != '\0') {
if ((*s == ' ') || (*s == '\\')) {
if ((*s == ' ') || ((*s == '\\') && (*(s + 1) == '\0'))) {
s++;
break;
}
+11 -2
View File
@@ -1898,12 +1898,21 @@ skip_endmodule:
if (i != -1)
snprintf(nodename, MAX_STR_LEN, "%s[%d]", noderoot, i);
else
else if (lhs != NULL)
strncpy(nodename, lhs->name, MAX_STR_LEN - 1);
else {
Printf("Error: Improper node name \"%s\".\n", noderoot);
goto skip_endmodule;
}
if (j != -1)
snprintf(assignname, MAX_STR_LEN, "%s[%d]", assignroot, j);
else
else if (rhs != NULL)
strncpy(assignname, rhs->name, MAX_STR_LEN - 1);
else {
Printf("Error: Improper assignment name \"%s\".\n",
assignroot);
goto skip_endmodule;
}
join(nodename, assignname);
+699 -418
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+1487 -1430
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File diff suppressed because it is too large Load Diff