Commit Graph

194 Commits

Author SHA1 Message Date
Tim Edwards 0fb5efd914 Corrected a crash condition during pin matching if any subcell has
no pins at all.
2018-03-28 12:39:40 -04:00
Tim Edwards 763117aabe Merge branch 'master' into work 2018-01-29 13:26:41 -05:00
Tim Edwards 96a95d337f Update at Mon Jan 29 13:26:39 EST 2018 by tim 2018-01-29 13:26:39 -05:00
Tim Edwards 393788a039 Changed behavior of the "lvs" script so that the setup file can
be specified as "nosetup" if the "lvs" command is being called
interactively from a terminal or as part of a larger script where
setup commands have been issued prior to running the "lvs" script.
Similarly, the log file can be specified as "nolog" to prevent any
log file from being generated.
2018-01-29 13:24:54 -05:00
Tim Edwards c630c2e397 Merge branch 'master' into work 2018-01-26 11:58:07 -05:00
Tim Edwards 1e8685128c Update at Fri Jan 26 11:58:05 EST 2018 by tim 2018-01-26 11:58:05 -05:00
Tim Edwards 440f61d540 Corrected a number of function returns, mainly to avoid compile-
time warnings and errors.  Removed the "-lazy" option from the
Tcl load command, which is not needed when the stubs libraries
are compiled in correctly, and which causes issues on some
systems (e.g., Mac OS).  Thanks to Matt Guthaus for the patch.
2018-01-26 11:56:41 -05:00
Tim Edwards cc532b2cb7 Merge branch 'master' into work 2017-12-14 21:50:33 -05:00
Tim Edwards 2a4c7b3cde Update at Thu Dec 14 21:50:32 EST 2017 by tim 2017-12-14 21:50:32 -05:00
Tim Edwards 87e44b0d8c Corrected an issue in which netgen would attempt to find a file
from a ".include" line by trying alternate extensions.  This
should be discouraged, as it happened that a file included
"name.defparams", a file that didn't exist, and instead of calling
out the missing file, it recast it to "name.spice" and caused it
to drop into an infinite loop.  Oops.
2017-12-14 21:48:01 -05:00
Tim Edwards e1322dbaf6 Merge branch 'master' into work 2017-12-07 08:46:43 -05:00
Tim Edwards 661157e041 Update at Thu Dec 7 08:46:40 EST 2017 by tim 2017-12-07 08:46:40 -05:00
Tim Edwards 77e5d70626 Corrected Tcl list output (and, by consequence, the JSON file
output) to include pin information (missing "-list" argument to
the "equate pins" command).
2017-12-07 08:45:37 -05:00
Tim Edwards 4098b7d5fd Completed an unimplemented method that sets missing properties to
the default before comparing instances against each other for
serial/parallel combination.  In particular, this avoids a
failure to serially combine a device with M = 1 vs. a device with
no M declared.
2017-10-12 15:26:29 -04:00
Tim Edwards f860244700 Provide additional output for mismatched serial/parallel networks.
Netgen was incorrectly treating mismatched networks as a missing
set of parameters on whichever device had more property records,
resulting in misleading output.
2017-10-12 14:17:24 -04:00
Tim Edwards 66015511cb Corrected mismatch count, which was prematurely declaring a
mismatch on "M=" even though some conditions pass.
2017-10-12 12:30:33 -04:00
Tim Edwards b3277ca53e Modified reading of SPICE files so that parameters in quotes get
treated monolithically instead of being broken up into separate
tokens according to space characters, which screws up the parameter
parsing.
2017-10-12 12:11:30 -04:00
Tim Edwards 00c2e74524 Merge branch 'master' into work 2017-10-12 10:52:58 -04:00
Tim Edwards bdb8917327 Update at Thu Oct 12 10:52:56 EDT 2017 by tim 2017-10-12 10:52:56 -04:00
Tim Edwards 95bce5dbd6 Corrected another error in the serial combination in which the
attempt to resolve values by combining over serial chains was
attempting to access a property "S" in the component's master
record, which generally won't exist unless it has been explicitly
set in the netlist (which is unlikely since "S" is not a standard
SPICE/CDL parameter like "M").
2017-10-12 10:51:13 -04:00
Tim Edwards e15620257c Merge branch 'master' into work 2017-10-10 22:25:50 -04:00
Tim Edwards 7a947ee9be Update at Tue Oct 10 22:25:49 EDT 2017 by tim 2017-10-10 22:25:49 -04:00
Tim Edwards b5f188de42 Corrected two errors in the serial combine function, one which
misses a device if it has been already moved due to earlier
merging in the serial combine routine, and runs off the end of
the list;  the other if the pin check routine falls on the last
device in the list, leading to an incorrect check for a record
where there is only a NULL.
2017-10-10 22:24:09 -04:00
Tim Edwards ccbb286cf3 Merge branch 'master' into work 2017-08-24 09:51:46 -04:00
Tim Edwards 4809c02f79 Update at Thu Aug 24 09:51:44 EDT 2017 by tim 2017-08-24 09:51:44 -04:00
Tim Edwards af3982766e Prevented a crash condition in the error case in which ports are
unordered at the time of reaching reorderpins().  Pins will be
ordered arbitrarily (in the order of appearance in the linked
list), but netgen will not crash.
2017-08-24 09:50:40 -04:00
Tim Edwards 25c1f13e16 Update at Thu Aug 10 22:41:12 EDT 2017 by tim 2017-08-10 22:41:12 -04:00
Tim Edwards f0eec657a3 Update at Wed Aug 9 09:04:43 EDT 2017 by tim 2017-08-09 09:04:43 -04:00
Tim Edwards 9d476bc25a Merge branch 'master' into work 2017-06-22 08:13:02 -04:00
Tim Edwards 5ed3fcb3f1 Update at Thu Jun 22 08:12:59 EDT 2017 by tim 2017-06-22 08:13:00 -04:00
Tim Edwards ab9659af17 Corrected coding error in tilde expansion of .include filenames. 2017-06-22 08:12:41 -04:00
Tim Edwards 41939adb84 Merge branch 'master' into work 2017-06-20 22:55:26 -04:00
Tim Edwards 39573981be Update at Tue Jun 20 22:55:24 EDT 2017 by tim 2017-06-20 22:55:24 -04:00
Tim Edwards b9e26f6fce Implemented better black-box handling. Netlist with "stub" entries
for subcircuits (.subckt ... .ends pair with cellname and pin names
and pin order, but no contents) are automatically treated as black-
box circuits if found and if the "-blackbox" option is passed to the
"lvs" (scripted) command.  The "equate pins" command can be used
outside of a comparison to force two circuits (black-box or
otherwise) to be matched by pin name (if not a black-box circuit,
then this is a provisional name match, as a circuit comparison will
order based on connectivity first, not pin names).  So two sets of
black-box circuit libraries can be used as long as their pin names
match.  One hack added to ignore the "!" at the end of global names
when comparing pin names for matching.  Otherwise, pin names must
compare by case-insensitive string match.
2017-06-20 22:50:31 -04:00
Tim Edwards 78779ce2e9 Corrected the "property parallel none" command option so that it
gets applied properly to all existing cells (as well as all
future cells, but normally the former is applicable in a setup
file for LVS).
2017-06-19 22:22:08 -04:00
Tim Edwards 70bb33cc62 Finally reworked "cells" command behavior into something
consistent.
2017-06-19 21:04:33 -04:00
Tim Edwards fdf2f32654 Fixed the "cells -all" command so that it now matches the
documentation, and behaves as intended, which is that "-all" is
not a standalone option but is itself an optional qualifier to
the "cells <valid_cellname>" command.  So the options are
"cells <valid_cellname>" and "cells -all <valid_cellname>".
2017-06-19 20:22:59 -04:00
Tim Edwards 05d4225e97 New command option "model blackbox on|off" makes "readnet spice"
treat empty subcircuits as blackbox cells automatically without
requiring specific callse to "model <cell> blackbox" for each.
Enabled in LVS script by giving option "-blackbox" at the end
of the LVS command.
2017-06-19 17:41:31 -04:00
Tim Edwards b6218699a9 Merge branch 'master' into work 2017-06-19 12:39:02 -04:00
Tim Edwards d7927ef547 Update at Mon Jun 19 12:39:00 EDT 2017 by tim 2017-06-19 12:39:00 -04:00
Tim Edwards af7bc39bbf Added tilde expansion handling for .INCLUDE statements to the
SPICE netlist read routine.
2017-06-19 12:38:27 -04:00
Tim Edwards 5cd68b9ef1 Merge branch 'master' into work 2017-06-18 22:48:13 -04:00
Tim Edwards 07788e7501 Update at Sun Jun 18 22:48:11 EDT 2017 by tim 2017-06-18 22:48:11 -04:00
Tim Edwards 24cc7d0c94 Update to add "property parallel none" command option. 2017-06-18 22:47:51 -04:00
Tim Edwards dbcd36d3ec Merge branch 'master' into work 2017-05-15 16:31:03 -04:00
Tim Edwards 25c17abb70 Update at Mon May 15 16:31:00 EDT 2017 by tim 2017-05-15 16:31:00 -04:00
Tim Edwards fd019b4afd Corrected the same error as a few commits back that causes a message
about property errors to show up, not due to property errors, but
due to proxy pins being inserted in the middle of a device record.
However, the first one was fixed for the case of proxy pins being
added to circuit 1, but the same fix was not made for the opposite
case of proxy pins being added to circuit 2.  This commit corrects
that omission.
2017-05-15 16:29:12 -04:00
Tim Edwards cdfd74bac4 Removed old comment from code referring to the development state. 2017-05-08 21:00:43 -04:00
Tim Edwards dd9e02c5f3 Merge branch 'master' into work 2017-05-08 20:57:01 -04:00
Tim Edwards 26cd16f3ff Update at Mon May 8 20:56:58 EDT 2017 by tim 2017-05-08 20:56:58 -04:00