85 lines
2.6 KiB
Python
85 lines
2.6 KiB
Python
from amaranth import *
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from amaranth_boards.nexys4ddr import Nexys4DDRPlatform
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from amaranth_boards.icestick import ICEStickPlatform
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from manta import Manta
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from manta.utils import *
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import pytest
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class LogicAnalyzerCounterTest(Elaboratable):
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def __init__(self, platform, port):
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self.platform = platform
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self.port = port
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self.config = self.platform_specific_config()
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self.m = Manta(self.config)
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def platform_specific_config(self):
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return {
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"cores": {
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"la": {
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"type": "logic_analyzer",
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"sample_depth": 1024,
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"trigger_loc": 500,
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"probes": {"larry": 1, "curly": 3, "moe": 9},
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"triggers": ["moe RISING"],
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},
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},
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"uart": {
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"port": self.port,
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"baudrate": 3e6,
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"clock_freq": self.platform.default_clk_frequency,
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},
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}
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def elaborate(self, platform):
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m = Module()
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m.submodules["manta"] = self.m
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uart_pins = platform.request("uart")
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larry = self.m.la.probe_signals["larry"]["top_level"]
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curly = self.m.la.probe_signals["curly"]["top_level"]
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moe = self.m.la.probe_signals["moe"]["top_level"]
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m.d.sync += larry.eq(larry + 1)
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m.d.sync += curly.eq(curly + 1)
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m.d.sync += moe.eq(moe + 1)
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m.d.comb += [
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self.m.interface.rx.eq(uart_pins.rx.i),
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uart_pins.tx.o.eq(self.m.interface.tx),
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]
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return m
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def build_and_program(self):
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self.platform.build(self, do_program=True)
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def verify(self):
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self.build_and_program()
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cap = self.m.la.capture()
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# check that VCD export works
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cap.export_vcd("out.vcd")
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# check that Verilog export works
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cap.export_playback_verilog("out.v")
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# verify that each signal is just a counter modulo the width of the signal
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for name, width in self.m.la.config["probes"].items():
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trace = cap.get_trace(name)
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for i in range(len(trace) - 1):
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if trace[i + 1] != (trace[i] + 1) % (2**width):
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raise ValueError("Bad counter!")
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@pytest.mark.skipif(not xilinx_tools_installed(), reason="no toolchain installed")
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def test_mem_core_xilinx():
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LogicAnalyzerCounterTest(Nexys4DDRPlatform(), "/dev/ttyUSB2").verify()
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@pytest.mark.skipif(not ice40_tools_installed(), reason="no toolchain installed")
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def test_mem_core_ice40():
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LogicAnalyzerCounterTest(ICEStickPlatform(), "/dev/ttyUSB1").verify()
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