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manta/examples/verilog/icestick
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Fischer Moseley 3e7bd8f1a5 manta: fix code generation from config file, update tests 2024-09-14 10:22:32 -07:00
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uart_io_core manta: fix code generation from config file, update tests 2024-09-14 10:22:32 -07:00
uart_logic_analyzer modify example design naming convention 2024-05-12 10:25:00 -07:00