manta/examples/verilog/icestick
Fischer Moseley 1c1c514a39 logic_analyzer: only set triggers if extra info provided in config 2024-10-08 11:42:10 -06:00
..
uart_io_core meta: sort imports with ruff 2024-10-08 11:42:10 -06:00
uart_logic_analyzer logic_analyzer: only set triggers if extra info provided in config 2024-10-08 11:42:10 -06:00