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manta/examples/verilog/icestick
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Fischer Moseley 1c1c514a39 logic_analyzer: only set triggers if extra info provided in config 2024-10-08 11:42:10 -06:00
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uart_io_core meta: sort imports with ruff 2024-10-08 11:42:10 -06:00
uart_logic_analyzer logic_analyzer: only set triggers if extra info provided in config 2024-10-08 11:42:10 -06:00