Fischer Moseley 66a1a2d6eb logic_analyzer: only set triggers if extra info provided in config		2024-09-14 10:24:10 -07:00
..
.gitignore	modify example design naming convention	2024-05-12 10:25:00 -07:00
build.sh	tests: include building examples in test suite	2024-09-14 10:22:32 -07:00
manta.yaml	logic_analyzer: only set triggers if extra info provided in config	2024-09-14 10:24:10 -07:00
top_level.pcf	modify example design naming convention	2024-05-12 10:25:00 -07:00
top_level.sv	examples: make verilog/amaranth versions of uart_logic_analyzer match	2024-09-14 10:23:05 -07:00