first pass at logic analyzer trigger block tests
This commit is contained in:
Fischer Moseley
parent
1528f569ef
commit
edd00310c4
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@ -92,10 +92,10 @@ class LogicAnalyzerCore(Elaboratable):
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)
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# Check triggers
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if (trigger_mode) and (trigger_mode != "immediate"):
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if ("triggers" not in config) or (config["triggers"] == 0):
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if trigger_mode and trigger_mode != "immediate":
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if "triggers" not in config or config["triggers"] == 0:
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raise ValueError(
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"Logic Analyzer must have at least one trigger specified."
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"Logic Analyzer must have at least one trigger specified if not running in immediate mode."
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)
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# Check trigger location
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@ -101,10 +101,10 @@ class LogicAnalyzerTrigger(Elaboratable):
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m.d.comb += self.triggered.eq(0)
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with m.Elif(self.op == self.operations["RISING"]):
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m.d.comb += self.triggered.eq((self.signal) & (~prev))
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m.d.comb += self.triggered.eq(self.signal > prev)
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with m.Elif(self.op == self.operations["FALLING"]):
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m.d.comb += self.triggered.eq((~self.signal) & (prev))
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m.d.comb += self.triggered.eq(self.signal < prev)
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with m.Elif(self.op == self.operations["CHANGING"]):
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m.d.comb += self.triggered.eq(self.signal != prev)
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@ -0,0 +1,181 @@
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from amaranth import *
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from amaranth.sim import Simulator
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from manta.logic_analyzer import LogicAnalyzerTriggerBlock
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from manta.utils import *
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from random import randint, sample
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# Make random number of random width probes
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probes = [Signal(randint(1, 32), name=str(i)) for i in range(randint(1, 32))]
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trig_blk = LogicAnalyzerTriggerBlock(probes, base_addr=0, interface=None)
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def write_trig_blk_register(name, value):
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strobe_addr = trig_blk.r.base_addr
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yield from write_register(trig_blk, strobe_addr, 0)
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addrs = trig_blk.r.mmap[f"{name}_buf"]["addrs"]
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datas = value_to_words(value, len(addrs))
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for addr, data in zip(addrs, datas):
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yield from write_register(trig_blk, addr, data)
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yield from write_register(trig_blk, strobe_addr, 1)
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yield from write_register(trig_blk, strobe_addr, 0)
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def test():
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def testbench():
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# Step through each probe and perform all functions in random order
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for p in trig_blk.probes:
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ops = trig_blk.triggers[0].operations
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for op in sample(list(ops.keys()), len(ops)):
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# Program operation register with selected register
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yield from write_trig_blk_register(f"{p.name}_op", ops[op])
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if op == "DISABLE":
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# Argument can be anything, since it's not used for this operation
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yield from write_trig_blk_register(
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f"{p.name}_arg", randint(0, (2**p.width) - 1)
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)
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yield p.eq(randint(0, (2**p.width) - 1))
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yield
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if (yield trig_blk.trig):
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raise ValueError("Trigger raised when disabled!")
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if op == "RISING":
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# Argument can be anything, since it's not used for this operation
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yield from write_trig_blk_register(
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f"{p.name}_arg", randint(0, (2**p.width) - 1)
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)
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yield p.eq(0)
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yield
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yield p.eq(randint(1, (2**p.width) - 1))
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yield
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if not (yield trig_blk.trig):
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raise ValueError(f"Trigger not raised on probe {p.name}!")
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if op == "FALLING":
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# Argument can be anything, since it's not used for this operation
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yield from write_trig_blk_register(
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f"{p.name}_arg", randint(0, (2**p.width) - 1)
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)
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yield p.eq(randint(1, (2**p.width) - 1))
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yield
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yield p.eq(0)
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yield
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if not (yield trig_blk.trig):
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raise ValueError(f"Trigger not raised on probe {p.name}!")
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pass
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if op == "CHANGING":
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# Argument can be anything, since it's not used for this operation
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yield from write_trig_blk_register(
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f"{p.name}_arg", randint(0, (2**p.width) - 1)
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)
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yield p.eq(randint(1, (2**p.width) - 1))
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yield
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if not (yield trig_blk.trig):
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raise ValueError(f"Trigger not raised on probe {p.name}!")
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pass
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if op == "GT":
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upper = randint(1, (2**p.width) - 1)
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lower = randint(0, upper - 1)
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yield from write_trig_blk_register(f"{p.name}_arg", lower)
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yield p.eq(upper)
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yield
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if not (yield trig_blk.trig):
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raise ValueError(f"Trigger not raised on probe {p.name}!")
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pass
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if op == "LT":
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upper = randint(1, (2**p.width) - 1)
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lower = randint(0, upper - 1)
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yield from write_trig_blk_register(f"{p.name}_arg", upper)
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yield p.eq(lower)
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yield
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if not (yield trig_blk.trig):
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raise ValueError(f"Trigger not raised on probe {p.name}!")
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pass
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if op == "GEQ":
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upper = randint(1, (2**p.width) - 1)
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lower = randint(0, upper - 1)
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# test that the case where it's equal
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yield from write_trig_blk_register(f"{p.name}_arg", lower)
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yield p.eq(lower)
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yield
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if not (yield trig_blk.trig):
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raise ValueError(f"Trigger not raised on probe {p.name}!")
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pass
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# test the case where it's greater than
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yield p.eq(upper)
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yield
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if not (yield trig_blk.trig):
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raise ValueError(f"Trigger not raised on probe {p.name}!")
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pass
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if op == "LEQ":
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upper = randint(1, (2**p.width) - 1)
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lower = randint(0, upper - 1)
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# test that the case where it's equal
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yield from write_trig_blk_register(f"{p.name}_arg", upper)
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yield p.eq(upper)
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yield
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if not (yield trig_blk.trig):
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raise ValueError(f"Trigger not raised on probe {p.name}!")
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pass
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# test the case where it's less than
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yield p.eq(lower)
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yield
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if not (yield trig_blk.trig):
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raise ValueError(f"Trigger not raised on probe {p.name}!")
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pass
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if op == "EQ":
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value = randint(0, (2**p.width) - 1)
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yield from write_trig_blk_register(f"{p.name}_arg", value)
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yield p.eq(value)
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yield
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if not (yield trig_blk.trig):
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raise ValueError(f"Trigger not raised on probe {p.name}!")
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pass
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if op == "NEQ":
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upper = randint(1, (2**p.width) - 1)
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lower = randint(0, upper - 1)
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# test that the case where it's equal
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yield from write_trig_blk_register(f"{p.name}_arg", upper)
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yield p.eq(lower)
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yield
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if not (yield trig_blk.trig):
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raise ValueError(f"Trigger not raised on probe {p.name}!")
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pass
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# disable probe once complete
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yield
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yield from write_trig_blk_register(f"{p.name}_op", ops["DISABLE"])
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yield from write_trig_blk_register(f"{p.name}_arg", 0)
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yield p.eq(0)
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simulate(trig_blk, testbench, "out.vcd")
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