From b729deb144f1414f81e89fc8020bfc3dcf48cbf2 Mon Sep 17 00:00:00 2001 From: Fischer Moseley <42497969+fischermoseley@users.noreply.github.com> Date: Sun, 3 Mar 2024 18:31:11 -0800 Subject: [PATCH] hardcode device paths in hardware tests --- test/test_io_core_hw.py | 6 ++++-- test/test_logic_analyzer_hw.py | 6 ++++-- test/test_mem_core_hw.py | 5 +++-- 3 files changed, 11 insertions(+), 6 deletions(-) diff --git a/test/test_io_core_hw.py b/test/test_io_core_hw.py index 13f29c6..6715728 100644 --- a/test/test_io_core_hw.py +++ b/test/test_io_core_hw.py @@ -143,9 +143,11 @@ class IOCoreLoopbackTest(Elaboratable): @pytest.mark.skipif(not xilinx_tools_installed(), reason="no toolchain installed") def test_output_probe_initial_values_xilinx(): - IOCoreLoopbackTest(Nexys4DDRPlatform(), "/dev/ttyUSB1").verify() + port = "/dev/serial/by-id/usb-Digilent_Digilent_USB_Device_210292696307-if01-port0" + IOCoreLoopbackTest(Nexys4DDRPlatform(), port).verify() @pytest.mark.skipif(not ice40_tools_installed(), reason="no toolchain installed") def test_output_probe_initial_values_ice40(): - IOCoreLoopbackTest(ICEStickPlatform(), "/dev/ttyUSB2").verify() + port = "/dev/serial/by-id/usb-Lattice_Lattice_FTUSB_Interface_Cable-if01-port0" + IOCoreLoopbackTest(ICEStickPlatform(), port).verify() diff --git a/test/test_logic_analyzer_hw.py b/test/test_logic_analyzer_hw.py index d1dd695..8a25335 100644 --- a/test/test_logic_analyzer_hw.py +++ b/test/test_logic_analyzer_hw.py @@ -78,9 +78,11 @@ class LogicAnalyzerCounterTest(Elaboratable): @pytest.mark.skipif(not xilinx_tools_installed(), reason="no toolchain installed") def test_logic_analyzer_core_xilinx(): - LogicAnalyzerCounterTest(Nexys4DDRPlatform(), "/dev/ttyUSB1").verify() + port = "/dev/serial/by-id/usb-Digilent_Digilent_USB_Device_210292696307-if01-port0" + LogicAnalyzerCounterTest(Nexys4DDRPlatform(), port).verify() @pytest.mark.skipif(not ice40_tools_installed(), reason="no toolchain installed") def test_logic_analyzer_core_ice40(): - LogicAnalyzerCounterTest(ICEStickPlatform(), "/dev/ttyUSB2").verify() + port = "/dev/serial/by-id/usb-Lattice_Lattice_FTUSB_Interface_Cable-if01-port0" + LogicAnalyzerCounterTest(ICEStickPlatform(), port).verify() diff --git a/test/test_mem_core_hw.py b/test/test_mem_core_hw.py index 02925c8..18070ee 100644 --- a/test/test_mem_core_hw.py +++ b/test/test_mem_core_hw.py @@ -112,12 +112,13 @@ class MemoryCoreLoopbackTest(Elaboratable): @pytest.mark.skipif(not xilinx_tools_installed(), reason="no toolchain installed") def test_mem_core_xilinx(): - MemoryCoreLoopbackTest(Nexys4DDRPlatform(), 33, 1024, "/dev/ttyUSB1").verify() + port = "/dev/serial/by-id/usb-Digilent_Digilent_USB_Device_210292696307-if01-port0" + MemoryCoreLoopbackTest(Nexys4DDRPlatform(), 33, 1024, port).verify() @pytest.mark.skipif(not ice40_tools_installed(), reason="no toolchain installed") def test_mem_core_ice40(): - port = "/dev/ttyUSB2" + port = "/dev/serial/by-id/usb-Lattice_Lattice_FTUSB_Interface_Cable-if01-port0" MemoryCoreLoopbackTest(ICEStickPlatform(), 1, 2, port).verify() MemoryCoreLoopbackTest(ICEStickPlatform(), 1, 512, port).verify() MemoryCoreLoopbackTest(ICEStickPlatform(), 1, 1024, port).verify()