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Fix integer bounds 

This bug was causing our 6.2050 project to fail lmao
This commit is contained in:
Andi Qu 2023-11-27 22:00:49 -05:00 committed by Fischer Moseley
parent a1130e8424
commit 096b5ff515
1 changed files with 3 additions and 3 deletions
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6
src/manta/utils.py
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@ -6,8 +6,8 @@ def pack_16bit_words(data):
concatenates them together in little-endian order."""
for d in data:
if d > 0: assert d < 2**16-1, "Unsigned integer too large."
if d < 0: assert d < 2**15-1, "Signed integer too large."
if d > 0: assert d < 2**16, "Unsigned integer too large."
if d < 0: assert d < 2**15, "Signed integer too large."
return int(''.join([f'{i:016b}' for i in data[::-1]]), 2)
@ -121,4 +121,4 @@ class VerilogManipulator:
conn = ",\n".join(conn)
conn = conn + "," if trailing_comma else conn
return conn
return conn