2024-03-07 08:07:20 +01:00
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---
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cores:
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my_logic_analyzer:
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type: logic_analyzer
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sample_depth: 256
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2024-09-10 04:27:29 +02:00
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trigger_mode: single_shot
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2024-03-07 08:07:20 +01:00
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probes:
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probe0: 1
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probe1: 4
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probe2: 8
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probe3: 16
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triggers:
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- probe2 EQ 3
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uart:
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port: "/dev/ttyUSB1"
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baudrate: 115200
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clock_freq: 100000000
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