in the SPICE netlist when using new device "csubcircuit" due to
a mismatch in the expected number of parameters. However, more
work needs to be done to cover capacitor top and bottom plates on
different planes.
added a long time ago, since capacitors use a different method for
calculating width and length than either transistors or resistors,
so subcircuits need a special class designator or else the extraction
may calculate the wrong dimensions for device width by totalling the
perimeter between the device and terminal types, as it would for a
MOSFET.
8.2.74. Top-level port names are now flagged independently of
any subcircuit port, so they are easier to identify when determining
naming precedence for the net. This makes the code cleaner and
removes the problems arising from non-top-level ports and global
names overriding the subcircuit port names.
window to change after hiding a layer using the toolbar and then
refreshing the layout. Fixed by saving and restoring the graphics
state around the routine that configures the toolbar image. Also
added a check to CifPaintCurrent to guard against using an unassigned
ClientData record as a pointer (causes a crash), and added braces
around "expr" values in the Tcl wrapper, which reportedly results in
faster execution of the expression.
routine was erasing and redrawing in one step, which ignored the
possibility of having to erase from one window and redraw in
another if the cursor moved focus from one window to another.
This led to crosshairs being improperly drawn and erased when
multiple windows were present, if the windows had different cells
loaded.
the patch was attempting to fix. For node naming, ports were given
precedence over globals. However, this failed to distinguish between
ports on the top level and ports down in the hierarchy. This has now
been fixed. Ports on the hierarchy top level have naming precedence
over everything else; otherwise, the traditional rules of node
naming precedence apply.
symmetric with writing them. Since the writing of .ext files
was changed to preferably use the location of the cell being
read, and since the extflat database does not save this path
information, it was necessary to check the main database entry
for each cell to determine if there is a non-default path where
the .ext file may have been saved (with the current working
directory used as a fall-back if the directory is not writeable).
behaviors: (1) An additional syntax for "widespacing" that allows
both the triggering metal's width AND run-length, which is typical
of rules in 65nm-and-below processes; and (2) a new "option"
statement for the DRC section, with (for now) one possible flag
"wide-width-noninclusive", indicating that the metal width given
for "widespacing" rules means that a violation is only triggered
for material with a width greater than the given rule width (as
opposed to the default interpretation of a width greater than
or equal to the given rule width).
since the edit box was undefined in the code, potentially this
fixes any number of random problems that might be seen with the
"port" command. Also: Modified the cell bounding box recalculation
so that it does not continually update a parent cell on every
addition of a child cell but only once for each child cell found.
This greatly reduces the time for GDS file input in the case of
large arrays of cells.
"--enable-cairo-offscreen" from working. Because the option
does not run the full Cario initialization, the grTCairoVisualInfo
is not set, and the first attempt to create a Cairo surface
fails with a segfault.
"port" and "noport" in the cifoutput section to distinguish
between layer:purpose pairs for port text vs. other kinds of
text. This allows a closer correspondence between GDS read and
write. Note that the port writing is currently only in the GDS
write routine, not in the CIF routine.
additional functionality for ports in GDS format. This has been
tested with a techfile encoding pin types on a different purpose
than the metal layer drawing purpose. The label rectangle is
correctly written to the GDS output as geometry on the pin
purpose layer, and the same layer gets read back in from the GDS
file and translated back into the label rectangle. Port order
is maintained.
geometry attached to a label in GDS using specific layer:purpose
pairs. The additional code maintains the order of ports when
writing out text to GDS, and attempts to attach geometry to labels
when the geometry is defined on the same layer:purpose pair as
the text, and the cifinput style declares the purpose to be a
port label.
This allows text appearing on a specific GDS layer:purpose pair
to be interpreted as a port. This does not quite match the
intended behavior of such layers, since it is implied that any
layer geometry coincident with the text should form the area of
the port, which is not (yet) handled. Also, it is presumably
implied that the port order matches the order in which text
appears in the GDS stream, but magic does not preserve this
order when re-writing any GDS output.
function that was available in versions 7.1 and earlier that
allows the use of the command "erase errors" to remove DRC error
paint (only when the DRC checker is off, of course).