macro. Based on observation of cells in PDKs where ORIGIN and/or
FOREIGN are non-zero, added code that forces a correction of LEF
macro coordinates to match the GDS coordinates, with an
equivalent negative shift of the LEF macro ORIGIN to compensate.
Normally, both ORIGIN and FOREIGN will be zero and the added code
will do nothing. Note that this code does not handle the
additional optional orientation. A LEF macro with a different
coordinate system than its GDS is already weird; a LEF macro
with a different rotation than its GDS is hopefully something
that nobody ever does in practice. If needed, I'll cross that
bridge when I come to it.
manhattan shapes (especially minimum-sized ones) to be eliminated,
as these can survive a shrink-grow operation intended to get rid
of such shapes. This implementation may not be in its final form
but should suffice for now.
instance names in both the selection and in the root edit CellDef,
and then wipes duplicate names from the selection and regenerates
unique IDs. This avoids the unexpected behavior displayed by
magic in which a "copy" function renames the *original* instance
and gives the original name to the copied instance. This is not
only unexpected, but causes an error in which "undo" after
multiple copies fails to remove earlier copies because the name
change was not recorded, and the instance can no longer be found
by name.
interactive wiring into coordinate-based commands. Added new
command extensions for "wire leg", "wire vertical", "wire type",
and "wire horizontal". Modified the command logging such that
"wire show" (which does not modify layout) does not get logged,
which avoids unnecessary logging of mouse movement.
that has since been compressed and given a ".gz" extension.
Removed code that uses a system call to "gunzip" and "gzip" when
the target file is compressed, since the compression is handled
in the code.
"MASK_HINTS" was implemented, it was put into a routine that
scales all coordinate-related properties, including "FIXED_BBOX",
but the original code that scaled only "FIXED_BBOX" was never
removed, resulting in the bounding box getting incorrectly scaled
twice by any grid scaling.
new CIF operator is used in a tech file. Reworked yesterday's
commit to add more related operators, so there are now four new
ones (also renamed them): interacting, noninteracting, overlapping,
and nonoverlapping. "interacting" now means overlapping or touching;
so the four cases allow all variations of adjacency between the two
material types.
regions of a given type and retains only those regions which
interact with (overlap) another given type. Both sets of types
can be either magic database types or CIF temp layers. This will
allow the implementation of rules that were not previously
possible.
connection to a net that has been decomposed into a resistor array
cannot be found. This indicates some fundamental error in the way
extresist works. However, it should not be producing an invalid
and unsimulatable netlist. Instead, it makes an arbitrary connection
from the device terminal to the resistor array and adds an entry in
the output netlist (.res.ext file). This results in a poor
representation of the resistor network to that terminal, but an
otherwise simulatable netlist. A warning is issued to note that an
arbitrary connection has been made. This is most typically a
"garbage in, garbage out" situation in which insufficient information
exists in a layout to inform magic on which direction current is
traveling through a net. However, it should be possible to rewrite
the extresist code so that magic makes somewhat informed decisions
about current paths and produces a halfway decent representation of
the actual net, instead of just giving up on the detailed extraction.
generate a name for an instance that is set to NULL. It is not
clear to me by an instance would have a NULL name, but apparently
it can happen, and should not crash magic.
the former code attempted to determine the precision and generate
an output without unnecessary trailing zeros. Unfortunately there
were counterexamples that fail to be formatted correctly, as found
by Mark Martin, and which generate output that has roundoff error.
Reimplemented the method using code found on StackOverflow, which
appears to solve the problem more robustly.
"bloat-all" which is "bloat-all types1 types2 distance" where the
"distance" value is a maximum amount to grow. It is not (that I
know of) particularly useful for generating output GDS, but it is
very useful for generating temporary layers for DRC checks,
especially things like determining tap distance for latch-up
rules. The alternative (used in the sky130 tech file) is a
tedious step-by-step "grow" followed by "and-not". This rule
option is much cleaner to implement and computes faster (although
it is still a boolean operator and is much slower than an edge
rule).
identifies areas which meet the proper definition of run-length
(both edges are parallel for the run-length distance or more).
Previously, errors were getting triggered for geometry where
only one edge exceeded the run-length distance.
which has the same meaning as the "maxwidth" function ("both"
checks either tile dimension to see if it exceeds the maximum).
This is a simple per-tile check and assumes that violations do
not occur across multiple tiles. This should be sufficient for
most checks.
different from the device (i.e., gate) width, for devices that do
not define a MOS-like gate spanning the width of the device. This
is restricted to the assumption that the terminal is rectangular
and therefore a simple width and length can be derived from the
area and perimeter. Also, length is defined as the smaller
dimension and width as the larger dimension. For additional
restrictions, see the updated documentation. This was added to
allow correct width and length extraction of a bipolar emitter
window, but may be more generally useful.
at a 45 degree angle will shadow the DRC rule for the material
drawn orthogonally (that is, the DRC rule for the distance between
orthogonal shapes will be eliminated from the rule deck).
generated cell is modified multiple times. If the original cell
is orphaned (no longer used anywhere in the design), it is deleted.
However, an instance of the cell may exist in the secondary
select buffer if the cell was previously moved or copied, and
an attempt to do another move or copy will clear the secondary
select buffer, encounter the deleted cell, and crash the program.
previously ignoring the parameters of the entire cell including
the device being overridden by the property, causing the output
to be wrong. The parameters should always be written out to the
.ext file, including the device whose output is being overridden.
mismatch in the SkyWater sky130_fd_io__top_pwrdetv2 circuit
because a resistor with ends shorted together was being assigned
an incorrect length and width. This was due to the similarity
in characteristics of the boundary vector between a shorted
resistor and an annular resistor. The terminals need to be
checked for shorted ends to disambiguate the two cases.
with zero gate error (and was reporting an infinite antenna ratio).
For now, just ignoring the zero-area case. However, since the
procedure is supposed to be looping through nets connected to
specific devices in the .ext file, then every entry is supposed to
have non-zero area, so there is some underlying problem here that
needs to be fixed.
surrounding a device tile may cause the device to be extracted
with the wrong node (picking up the node from the wrong side of
the diagonal tile). Added extra handling to capture the case
where two ports on two different nets are merged when using
"ext2spice short" (previously it was handling only ports on the
same net). Also: Removed the redundant readline-4.3 from the
readline/ directory; only readline/readline is left, which is
version 4.3.
"extract unique notopports" both fail to work correctly because
an attempt some time ago to avoid issuing warnings about shorted
port names when using those options was changed in the wrong
line.
angled edges. This is a rare case and so has never come up before,
but can happen especially on transistors with gate or diffusion
with 45 degree chamfers or flanges. Thanks to Mark Martin for
providing the use case.
request #325 from Daryl Miles. Made a few simple style changes
to conform to (what is vaguely defined as) the overall programming
style for magic (passed down from John Ousterhout).
which prevents the "Ctrl-P" key from raising the .params window;
the underlying error is that the original error in the "property"
command was a disagreement about where "argstart" is placed. The
command was fixed to make the "property" command work correctly.
However, the solution made "argstart" wrong when using the command
"cellname property". Now both uses are handled correctly.
added fairly recently when getting rid of crashes related to
commands operating on non-edit cells. The lack of a cast was
prevening compilation on systems with more rigorous error
checking.
Previously, a file path beginning with "/", "./", or "../" would be
searched for verbatim and no searching would be done over paths.
This behavior now occurs for a leading "/" only. File paths with
"./" or "../" will search for the file with the path verbatim, then
proceed to search for the file with each search path prepended to
the filename as usual. This solves a problem for reusable, non- PDK
IP blocks, where the IP block may have an abstract view pointing to
a GDS file which is specified as being located at "../gds/<file>".
This file would not be found if the IP block was included into
another project. Now it can be done if the path to the IP is given
by "addpath".
unique" on a flattened layout (some labels end up NULL and the
NULL condition needs to be checked). Also remembered to update
VERSION, which was missed on the last commit.
the same: (1) If the inodes of the filename are the same, then the
cells are the same. This avoids treating symbolic links as
different paths with different files; (2) If both layouts are in
git repositories and the git repository commit hashes are the same,
then the cells are considered to be the same. This allows projects
to be cloned into other projects as dependencies and used in
multiple places without magic treating them as different layouts.
assign the result to anything, causing later uses of variable
"lobj" to have an unitialized value and potentially causing a
crash condition. Thanks to Risto Bell for pointing out the
error.
some of the "select" command syntax; the code change caused the
"select top cell" command to behave the same as "select cell".
There was no specific code for handling "top", so now there is.
that no nets will be checked for antenna gate and diffusion area,
and no antenna properties will be output to the LEF file. This can
greatly speed up LEF output file generation for a large design.
Thank you to Tamas Hubai for the code patch.
in the .mag file "properties" list are not handled as being in
database units during .mag file reading and writing (although they
do track internally), making them subject to being scaled incorrectly
and change between a read and a write. Thanks to Sylvain Munaut for
identifying the problem.
a transistor's first tile record is a well or substrate type;
normally this is avoided, but if that's the only device terminal
that connects to the node, it will be used. Also changed the
code to not report a failure when space is found under the
device, when space is allowed as a substrate type. Instead it
will print a message that the substrate is not being extracted as
a resistive network. However, note that the correct solution is
to do what the regular "extract" code does, which is to paint the
substrate type in the cell area first, so that there are valid
tile types to use for extracting the substrate network.
a .mag file to include the original system path. This restores the
ability to find the tech file for any cell created using the old
SCMOS technologies. This method is as problematic as is the way
all SCMOS tech files used the same name "scmos". But at least it
preserves backwards-compatible behavior (behavior prior to 8.3.471).
This commit corrects github issue #306.
report it after "Failure to read in entire sub-tree". This will
not report every failing cell (since it quits reading after the
first failure) but will avoid the existing issue of printing
nothing and leaving the user with no feedback as to which cell
was the problem.
non-Manhattan geometry is analyzed for resistance extraction.
This patch merely prevents the crash condition. It does not
solve the root of the problem, which is that split tiles can
belong to two different nets, but the tile can hold extraction
information for at most one of those nets.
reduce the amount of redundant painting done by the connectivity
search algorithm, but which was preventing composed types (such
as FET gates) from getting added to a net if one of the composing
types (such as poly) was drawn over the device in an ancestor
cell. Removing the "if" statement does not appear to have any
significant performance impact, so this change is being adopted.
argument. For interactive magic in the Tcl/Tk wrapper, the
"-nowindow" option was appended to the command line. But for
Tcl scripts on the command line, all arguments following the
script name are considered arguments of the script. So the
"-nowindow" argument has to be inserted at the beginning of
the command line as the first argument after "magic".
previously, MASTERSLICE layers would not be added to obstruction
layers made by "-hide". However, an nwell, for example, that
stuck outside of a prBoundary *would* be recorded, which was
inconsistent. Resolved this by allowing MASTERSLICE layers
in the OBS block, but only for layers that are not a substrate
type. NOTE: It may be better to just insist that a MASTERSLICE
layer define an obstruction type in the "lef" section of the
tech file, and treat it like routing obstructions. Alternatively,
one may question whether special obstruction types are needed at
all, as one could simply define an obstruction as a type without
a port label.
contains brackets which are not indicating a cell array. Also
fixed a related issue with the PDK toolkit code, in which the
gencell routines fail if an instance name contains brackets which
are not indicating a cell array.
present. Note, however, this fix breaks the use of "ext2spice
subcircuit descend off" because subcircuits are always descended
into. It's not clear that "subcircuit descend off" worked at all
before, anyway. That still needs fixing.
non-default rule. The code was first failing to identify the via
cut type from the generated via record, and then it was failing
to return to the non-default rule width after the route exits the
via. Both issues have been fixed. Thanks to Sylvain Munaut for
providing a reproducible test case.
new port labels are created for an existing port, then they must
take the existing port number. The code was previously causing
collisions between port numbers on different pins.
lefLayer's "via" record even when the layer might not be a via,
causing potential issues with uninitialized variables. Not sure
if this is related to the bug that started this investigation,
but it was the only thing that looked relevant.
used in a re-entrant manner. Applied to an existing layout,
it will no longer keep generating new instances and ports over
top existing ones. Could use improvement by attempting to
retain the location of a device when the instance changes
device type (such as when a device parameter was changed in
the netlist). However, the current set of changes should
help, whether the re-entrant use is purposeful or accidental.
fails in the bplane code for subcell binning. It is still not
clear why this example causes a failure when the bplane code
has been working for so long. However, simply checking for the
BT_ARRAY bit at one additional point in the code prevents the
crash condition and appears not to have caused any issue with
the database.
a method that failed to work on devices with complex shapes on the
device recognition layer, such as snake-geometry resistors. (2)
The use of contact type "xpc" in the sky130 tech file as its own
contact residue caused the contact tracing in extresist to fail.
I opted to keep the unorthodox contact description in the tech
file and wrote an extension to a routine in extresist to handle
the case.
from Ryan Schmidt, changing regular expression strings in the python
preprocessor to raw string types so that they don't produce warnings
in python 3.12.
name. The instance search routine was not rejecting internal cells,
and so would choose, e.g., a selection cell and reject it because it
was not the edit cell.
The fractional part of the rule distance (modulus after scaling)
does not fit in the unsigned char variable unless it is first
divided by the scalefactor (also requires multiplying up by the same
amount when scaling the other direction). The truncation of the
unsigned char value was causing the minimum area value to be off by
a small amount, causing false negatives (no DRC violation is shown
when metal area is slightly smaller than the minimum allowed).
that resolves issues of excessive tile fracturing during read-in
of GDS (or CIF) polygons and paths that have non-manhattan geometry.
This was particularly noticeable when reading the GF180MCU corner
I/O cell, which ended up being something close to a worst-case
scenario.
missing from a netlist generated by ext2spice with the "extresist"
option enabled. The first had to do with some parts of nets being
given alias names for a net, and the second was caused during
"extresist" and would also result in error messages about devices
missing terminals.
"gds readonly true" mode and when writing a GDS file in full-dump
mode. Reading or writing a file with an incompatible DBU is now
prohibited. This is not a great solution, as it forces the
original file to be rewritten with a different DBU. Preferably
there should be code to scale the units during a dump, but that
needs to be coded.
correctly handle subcircuits that are used before they are
defined, and will determine whether the imported spice does or
does not contain a top level, and either return to the top level
or any top level cell found in the netlist.
client data value as the exit status value (this was not at
all clear from the documentation and required a bit of
experimentation). The fix allows Tcl scripts to exit magic
with a non-zero status by invoking "exit" in Tcl.
depending on the order of extraction devices. Specifically, the
case of a source-drain tied FET was breaking out of a loop when
it should have been breaking out of a double loop.
cell being generated. This statement does not disambiguate the
case where a cell is being ripped verbatim from GDS instead of
being generated from the magic database. This print statement
has been split into two cases, and where a cell is being ripped
verbatim, the name of the file is indicated. This provides better
information to the user.
no way to implement boolean operators on labels, so any "label"
statement in the section can apply only to one magic layer. This
is regularly violated in most (all?) techfiles (due mainly to lack
of explanation and guidance). The addition of the "no-reconnect-
labels" option for cifinput made it worse, as it can cause a label
to be attached to the wrong layer and be stuck that way. Even
without the option, an attachment to a non-connecting type is a
problem; DIFF cannot simultaneously have a connection to both
ndiff and pdiff, so it will be one or the other, and the one not
connected can easily get labels moved to other nets. To avoid
this: (1) removed the "no-reconnect-labels" option, and (2) made
the automatic label reconnection smarter, as well as splitting it
into two different behaviors based on whether a label is being
created or manipulated from the command line (more or less the
original behavior) vs. being read from GDS or LEF. The new rules
assume that labels attached to a GDS type will all map to the
same plane in magic. To avoid excessive error messages from
existing tech files, a warning is issued only if "labels" changes
the plane of the target layer (a realistic solution rather than
the preferred one). Also: Fixed an error that causes a crash on
the "wizard" command "*watch" if the cell being observed is
read-only (see github issue #271).
"unexpected asymmetric device" is printed prematurely, as it
is inside a loop checking over all device entries compatible
with a device type. Also: Flagged an issue with the "label"
keyword in the "cifinput" section of a tech file. The "label"
keyword cannot be used in conjunction with boolean operators.
It can only connect labels on a specific GDS type to one magic
type. Unfortunately, because this was not flagged before as
an error or warning, the incorrect usage has crept into a lot
of tech files. This uncovers an underlying issue that labels
must be allowed to automatically reconnect types, which is
undermined by the "no-reconnect-labels" cifinput option. That
issue will be addressed in an upcoming commit.
to pick up properties from an existing cell and prints an error
message instead. This will likely cause non-default properties
of an instance to be lost if the SPICE import is used in a
re-entrant manner (not exactly a common use-case).
was made to limit the ExtFindRegions() search to one plane per
contact. Fixed this simply by doubling the resistance per via
so that the final result is correct.
bounds should be called whenever an entry is changed and either
the entry window loses focus or the <Enter> key is pressed.
This had ended up disabled when the scrollbar was added to the
dialog window, causing the window hierarchy to change, which
invalidated the regexp used to identify the entry and checkbox
widgets.
cuts per contact area during parasitic resistance extraction.
Previously, the result was divided by the via pitch twice,
resulting in most contact areas being reported as a single
cut.
in DEF read and write. The NONDEFAULT LAYER WIREEXT was assumed
to refer to the default wire extension at segments, when instead
it refers to the wire extension only at vias. The wire
extension at segments is presumably defined by the nondefault
segment (and wire extension at vias remains unimplemented, which
is probably not a big issue because everyone puts the wire
extensions into the via definitions anyway).
all of its time running area searches on zero-area rectangles,
which was causing simple extractions to run hours. Checking for
a zero area rectangle and conditionally skipping the area search
resulted in a massive speed-up in parasitic extraction.
because commands issued during initialization set the DRC status
in a way that causes DRCContinuous() to return immediately.
Also: Implemented a slightly different method when automatically
finding the tech file from the input .mag file that loads a
technology .magicrc file if one exists. If not, just the .tech
file is loaded. This replaces the method of a previous commit
that loads the technology .tcl script. The .magicrc file will
include the .tcl script but does other things as well.
the time the option was implemented), and also implemented (and
documented!) a similar command option "extract stepsize" for
reporting or changing the extraction step size.
out where to find the technology corresponding to a file given on
the command line: (1) Changed the default search location from
/usr/share/pdk to /usr/local/share/pdk, which is the actual default
for open_pdks (can still be overridden by environment variable
PDK_ROOT). (2) Made the PDK name by itself preferable to the PDK
name plus any extension when searching (e.g., "sky130A" is preferred
over "sky130A_backup"). (3) Check the located directory for any
file <tech_name>.tcl and source it if it exists. (4) Run any tag
callbacks on the "tech load" command, which rebuilds the tool icons.
when a label has no area and magic has to go searching for the
label area. The resulting behavior is better but is not really
a substitute for adding ports on the proper layers in the proper
locations for routing connections.
R. Timothy Edwards