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Made some changes to the extresist code to handle the case where 

a transistor's first tile record is a well or substrate type;
normally this is avoided, but if that's the only device terminal
that connects to the node, it will be used.  Also changed the
code to not report a failure when space is found under the
device, when space is allowed as a substrate type.  Instead it
will print a message that the substrate is not being extracted as
a resistive network.  However, note that the correct solution is
to do what the regular "extract" code does, which is to paint the
substrate type in the cell area first, so that there are valid
tile types to use for extracting the substrate network.
This commit is contained in:
Tim Edwards 2024-05-04 20:16:55 -04:00
parent 3dc5018af4
commit efccdbf341
3 changed files with 34 additions and 7 deletions
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2
VERSION
View File

@ -1 +1 @@
8.3.477
8.3.478

33
resis/ResMain.c
View File

@ -1055,11 +1055,14 @@ ResExtractNet(node, goodies, cellname)
* that does not correspond exactly to the layer underneath, include
* all connecting types.
*/
TTMaskZero(&FirstTileMask);
TTMaskSetMask(&FirstTileMask, &DBConnectTbl[node->type]);
if (node->type != TT_SPACE)
{
TTMaskZero(&FirstTileMask);
TTMaskSetMask(&FirstTileMask, &DBConnectTbl[node->type]);
DBTreeCopyConnect(&scx, &FirstTileMask, 0, ResCopyMask, &TiPlaneRect,
DBTreeCopyConnect(&scx, &FirstTileMask, 0, ResCopyMask, &TiPlaneRect,
SEL_DO_LABELS, ResUse);
}
TTMaskZero(&ResSDTypesBitMask);
TTMaskZero(&ResSubTypesBitMask);
@ -1651,11 +1654,31 @@ FindStartTile(goodies, SourcePoint)
if (tp != NULL) return tp;
}
}
/* Is it possible that the net is the substrate under the device? */
for (pnum = 0; pnum < DBNumPlanes; pnum++)
{
DBSrPaintArea((Tile *)NULL, ResUse->cu_def->cd_planes[pnum],
&r, &(devptr->exts_deviceSubstrateTypes), ResGetTileFunc, &tp);
if (tp != NULL) return tp;
}
}
/* Didn't find a terminal (S/D) type tile anywhere. Flag an error. */
/* If any device type has TT_SPACE as a substrate type, then don't
* issue an error; however, not handling the substrate as a
* resistive network is not a good idea and "extresist" needs to use
* the method employed by "extract" of drawing a substrate type out
* to the boundary of each subcell.
*/
TxError("Couldn't find a terminal of the device at %d %d\n",
for (devptr = ExtCurStyle->exts_device[t1]; devptr; devptr = devptr->exts_next)
if (TTMaskHasType(&(devptr->exts_deviceSubstrateTypes), TT_SPACE))
break;
/* Didn't find a terminal (S/D or substrate) type tile anywhere. Flag an error. */
if (devptr == NULL)
TxError("Couldn't find a terminal of the device at %d %d\n",
goodies->rg_devloc->p_x, goodies->rg_devloc->p_y);
return((Tile *) NULL);
}

6
resis/ResRex.c
View File

@ -1206,7 +1206,11 @@ ResCheckSimNodes(celldef, resisdata)
if (ResExtractNet(node, &gparams, outfile) != 0)
{
/* On error, don't output this net, but keep going */
TxError("Error in extracting node %s\n", node->name);
if (node->type == TT_SPACE)
TxPrintf("Note: Substrate node %s not extracted as network.\n",
node->name);
else
TxError("Error in extracting node %s\n", node->name);
}
else
{