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inv.cir
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Added reference circuit
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2019-07-02 00:30:50 +02:00 |
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inv.lvs
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WIP: added more test data, doc links
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2019-07-02 02:03:58 +02:00 |
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inv.lvsdb
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Boundary for circuits, reverted automatic generation of global pins
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2019-07-09 19:55:48 +02:00 |
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inv.oas
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Added inverter test layout
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2019-07-02 00:27:05 +02:00 |
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inv2.cir
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WIP: added more test data, doc links
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2019-07-02 02:03:58 +02:00 |
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inv2.lvs
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WIP: added more test data, doc links
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2019-07-02 02:03:58 +02:00 |
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inv2.lvsdb
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Boundary for circuits, reverted automatic generation of global pins
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2019-07-09 19:55:48 +02:00 |
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inv2.oas
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WIP: added more test data, doc links
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2019-07-02 02:03:58 +02:00 |
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inv2_layout.cir
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WIP: one more test for LVS
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2019-07-06 09:08:32 +02:00 |
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inv_layout.cir
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WIP: refactoring, added first tests for LVS
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2019-07-06 08:52:40 +02:00 |
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ringo.cir
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Providing LVS tests.
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2019-07-07 21:33:28 +02:00 |
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ringo.gds
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Providing LVS tests.
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2019-07-07 21:33:28 +02:00 |
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ringo_for_blackboxing.cir
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WIP: some fixes and small enhancements. New tests.
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2019-07-08 00:09:10 +02:00 |
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ringo_for_blackboxing.gds
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Provide bulk label for blackboxed cells
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2019-07-09 20:23:47 +02:00 |
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ringo_for_simplification.cir
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WIP: some fixes and small enhancements. New tests.
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2019-07-08 00:09:10 +02:00 |
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ringo_for_simplification.gds
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WIP: some fixes and small enhancements. New tests.
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2019-07-08 00:09:10 +02:00 |
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ringo_implicit_connections.gds
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Providing LVS tests.
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2019-07-07 21:33:28 +02:00 |
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ringo_pin_swapping.cir
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WIP: some fixes and small enhancements. New tests.
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2019-07-08 00:09:10 +02:00 |
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ringo_renamed.gds
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WIP: some fixes and small enhancements. New tests.
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2019-07-08 00:09:10 +02:00 |
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ringo_simple.cir
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Providing LVS tests.
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2019-07-07 21:33:28 +02:00 |
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ringo_simple.lvs
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Providing LVS tests.
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2019-07-07 21:33:28 +02:00 |
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ringo_simple.lvsdb
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Boundary for circuits, reverted automatic generation of global pins
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2019-07-09 19:55:48 +02:00 |
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ringo_simple_blackboxing.cir
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WIP: some fixes and small enhancements. New tests.
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2019-07-08 00:09:10 +02:00 |
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ringo_simple_blackboxing.lvs
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Provide bulk label for blackboxed cells
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2019-07-09 20:23:47 +02:00 |
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ringo_simple_blackboxing.lvsdb
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WIP: some fixes and small enhancements. New tests.
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2019-07-08 00:09:10 +02:00 |
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ringo_simple_implicit_connections.cir
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Providing LVS tests.
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2019-07-07 21:33:28 +02:00 |
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ringo_simple_implicit_connections.lvs
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Providing LVS tests.
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2019-07-07 21:33:28 +02:00 |
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ringo_simple_implicit_connections.lvsdb
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Boundary for circuits, reverted automatic generation of global pins
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2019-07-09 19:55:48 +02:00 |
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ringo_simple_io.cir
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Providing LVS tests.
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2019-07-07 21:33:28 +02:00 |
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ringo_simple_io.lvs
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Providing LVS tests.
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2019-07-07 21:33:28 +02:00 |
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ringo_simple_io.lvsdb
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Boundary for circuits, reverted automatic generation of global pins
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2019-07-09 19:55:48 +02:00 |
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ringo_simple_io2.cir
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Providing LVS tests.
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2019-07-07 21:33:28 +02:00 |
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ringo_simple_io2.l2n
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Boundary for circuits, reverted automatic generation of global pins
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2019-07-09 19:55:48 +02:00 |
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ringo_simple_io2.lvs
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Providing LVS tests.
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2019-07-07 21:33:28 +02:00 |
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ringo_simple_io2.lvsdb
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Boundary for circuits, reverted automatic generation of global pins
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2019-07-09 19:55:48 +02:00 |
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ringo_simple_net_and_circuit_equivalence.cir
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WIP: some fixes and small enhancements. New tests.
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2019-07-08 00:09:10 +02:00 |
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ringo_simple_net_and_circuit_equivalence.lvs
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WIP: some fixes and small enhancements. New tests.
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2019-07-08 00:09:10 +02:00 |
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ringo_simple_net_and_circuit_equivalence.lvsdb
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Boundary for circuits, reverted automatic generation of global pins
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2019-07-09 19:55:48 +02:00 |
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ringo_simple_pin_swapping.cir
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WIP: some fixes and small enhancements. New tests.
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2019-07-08 00:09:10 +02:00 |
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ringo_simple_pin_swapping.lvs
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WIP: some fixes and small enhancements. New tests.
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2019-07-08 00:09:10 +02:00 |
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ringo_simple_pin_swapping.lvsdb
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Boundary for circuits, reverted automatic generation of global pins
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2019-07-09 19:55:48 +02:00 |
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ringo_simple_same_device_classes.cir
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WIP: some fixes and small enhancements. New tests.
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2019-07-08 00:09:10 +02:00 |
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ringo_simple_same_device_classes.lvs
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WIP: some fixes and small enhancements. New tests.
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2019-07-08 00:09:10 +02:00 |
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ringo_simple_same_device_classes.lvsdb
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Boundary for circuits, reverted automatic generation of global pins
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2019-07-09 19:55:48 +02:00 |
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ringo_simple_simplification.cir
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WIP: some fixes and small enhancements. New tests.
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2019-07-08 00:09:10 +02:00 |
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ringo_simple_simplification.lvs
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WIP: some fixes and small enhancements. New tests.
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2019-07-08 00:09:10 +02:00 |
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ringo_simple_simplification.lvsdb
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Boundary for circuits, reverted automatic generation of global pins
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2019-07-09 19:55:48 +02:00 |
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vexriscv.cir.gz
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WIP: added full LVS test.
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2019-07-08 21:43:06 +02:00 |
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vexriscv.lvs
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WIP: reverted modifications on SPICE reader.
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2019-07-08 21:51:59 +02:00 |
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vexriscv.oas.gz
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WIP: added full LVS test.
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2019-07-08 21:43:06 +02:00 |
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vexriscv_schematic.cir.gz
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WIP: added full LVS test.
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2019-07-08 21:43:06 +02:00 |
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